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From: | Tristan Van Berkom |
Subject: | Re: GNU Make 3.79, consolidating dependancy lines |
Date: | Fri, 14 May 2004 15:02:56 -0400 |
User-agent: | Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.2.1) Gecko/20030225 |
Karl Berry wrote: [...]
In fact, computed variable names with virtually that exact syntax are apparently supported. See the Computed Names node in the manual, although I don't know if it will work in a pattern rule, such as: %.prg: $($(%prog.objs)) link -o $@ $^
This wont work because make variables are expanded in the preprocessing phase, and % pattern rules are expanded only into the automatic variables that exists are rule execution time (i.e. your $@ and $^). Actualy I use this form: %.prg: link -o $@ $^ While dependancies have already been sorted out using wildcards and subst/patsubst et al. (but the meticulous makefile writer could checkout make 3.80 and use the $(eval ...) function to generate rules for exactly this purpose). Cheers, -Tristan
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