Re: Preprocessing files with make

[Paul D. Smith]

%% erik.cato@japro.se (Erik Cato) writes:

  >> > SRCS     = $(foreach dir,$(VPATH),$(wildcard $(dir)/*.c))
  >> > PREPROCS = $(notdir $(patsubst %.c,%.d,$(SRCS)))
  >> 
  >> Now you have a list of SRCS, such as "alpha.c beta.c gamma.c"
  >> and a list of PREPROCS, such as "alpha.d beta.d gamma.d".
  >> And you want "make" to behave as if you had these dependencies:
  >> 
  >> alpha.d: alpha.c
  >> beta.d: beta.c
  >> gamma.d: gamma.c
  >> 
  >> I don't know how to do that either.  If anybody does know,
  >> I'd like to know, too!
  >> 
  >> Gnu Make supports pattern rules with '%' in them:
  >> 
  >> %.d: %.c

This is the right way.

  >> However this is not as flexible, and pattern rules interact poorly
  >> if you have another dependency rules for the same files.

Not as flexible as what?  Sure, it's not possible to build foo.d from
bar.c using a pattern rule, but you don't want to do that anyway: look
at the way you've constructed the names of the .d files!  This
environment is _perfect_ for pattern rules.

In what way does it interact poorly with other dependency rules?

  ec> Yes, you have the quesion right! Now does anyone have a solution?

There are more advanced features, yes, such as GNU make's auto-re-exec
feature and the $(eval ...) function (introduced in GNU make 3.80).

But before we go into those you'll have to explain why pattern rules
don't solve the problem: in this case they're just what you need and
there's no use getting more complicated if you don't have to.

-- 
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 Paul D. Smith <psmith@gnu.org>          Find some GNU make tips at:
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