Re: gmake: how to avoid $$@ usage?

[Paul D. Smith]

%% Ernest <ecrvichNOSPAM@NOSPAMfootbag.org> writes:

  e> Actually, I think I found a way today to do this with $(shell) so I
  e> don't have to re-invoke make (which wouldn't work since the
  e> sub-make wouldn't have all the currently defined vars, and there
  e> are a LOT of them).

No, I guess I wasn't clear: my comment meant you'd have to run make
twice; the first time with a target that build the included makefiles,
like this:

    make makefiles

where the "makefiles" target's command script would generate the
makefiles (maybe recursively).  All the variables would be available
here: it's the same makefile.  Then you'd re-run the command without a
target (or a different target) to do the actual build.

  e> Necessity is the mother of invention, right?  8^)  Whew!

I guess if you don't mind the performance impact of invoking a shell
script to rebuild every makefile every time you invoke the build, it's
OK :-).

-- 
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