warning: overriding commands for target

[James]

Let's say

cat Makefile

include A.mk
include B.mk

A.mk and B.mk define the same target since, depending on the global
variables,
Makefile may include one or both .mk files.

Is there a way to do it without the warning message,
warning: overriding commands for target ... ?

I am looking for a method such as
if defined already, skip the following section


Thanks.
James