Re: Make: multiple files to GCC

[Henrik Carlqvist]

Thomas Matthews <Thomas_Hates_Spam@cox.network> wrote:
> my_executable.exe : file_a.o file_b.o file_c.o file_d.o

In my example I did choose to simplify things by naming files like a.c
and a.h.
 
> file_a.o : file_a.c file_a.h
> 
> file_b.o : file_b.c file_b.h
> 
> file_c.o : file_c.c file_c.h
> 
> file_d.o : file_d.c file_d.h
> 
> In the above scenario, if all the '.o' file are deleted, the gcc
> compiler will be invoked four times, once for each file.
> 
> I would like to invoke gcc once with four files on the command line:
>    gcc -c file_a.c file_b.c file_c.c file_d.c

To accomplish this I had to use touch, but I think that It won't take to
much time. This is my Makefile:
-8<-------------------------------------------------------- 
all: a-test

%.o: %.c %.h
        touch $@

a-test: a.o b.o c.o
        gcc -c $(subst .o,.c,$?)
        gcc -o $@ a.o b.o c.o
-8<--------------------------------------------------------

So there will be one touch made for every file that needs to be
recompiled, but all files will be recompiled with one call to gcc.

regards Henrik
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