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makefile help
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From: |
AnandA |
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Subject: |
makefile help |
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Date: |
Mon, 15 Jun 2009 18:32:36 -0700 (PDT) |
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User-agent: |
G2/1.0 |
I have a requirement where I need to compile a target twice in the
same makefile. I'm compiling a C code and then linking but using
linker utility to generate an output file.
This output file I want to use to compile again the same C code and
then link for final output generation.
I'm compiling for our own processor. I was wondering how I can write
makefile for achieving this.
Thanks,
Anand.
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