[Help-gnucap] Flip-flop RS

[Jose Roberto B. de A. Monteiro]

Hello list, hello Al,

After correcing the probe (soory by that :), I got an answer of this
flip-flop NOR RS circuit simulation. The gnucap script is shown bellow
and the circuit can be viewed in not-test.png (attached), made by gschem.

* nor-test
.options METHOD=EULERONLY
.options TNOM=27
* Spice netlister for gnetlist
V2 1 0 10V
V1 4 0 10V
U2 2 0 4 4 3 5 CMOS NOR
V3 5 0 10V
U1 3 0 4 4 1 2 CMOS NOR
.model CMOS LOGIC
.print dc V(V2) V(V3) V(U1) V(U2)
.dc V2 0 10 2 >nor-test.dat
.END


According to the manual, a logic gate is written as:

U? out gnd vcc ena in1 in2 family gatetype

The DC simulation gave the result as follows:
#           V(V2)      V(V3)      V(U1)      V(U2)
  0.         0.         10.        5.         0.
  2.         2.         10.        5.         0.
  4.         4.         10.        5.         0.
  6.         6.         10.        5.         0.
  8.         8.         10.        5.         0.
  10.        10.        10.        5.         0.

Now the output have a numeric answer but is not as expected. If it is a
CMOS type logic, the expected answer for V(U1) is 10V, like V1. And, if
V2 is 10V in the last line, V(U1) and V(U2) should be both equal to 0.

I tried a simple simulation for a transient analisys but I've got a seg
fault! The script is the following:

* nor-test
.options MODE=DIGital
.options METHOD=EULERONLY
.options TNOM=27
* Spice netlister for gnetlist
V2 1 0 10V
V1 4 0 10V
U2 2 0 4 4 3 5 CMOS NOR
V3 5 0 10V
U1 3 0 4 4 1 2 CMOS NOR
.model CMOS LOGIC
.print tran V(V2) V(V3) V(U1) V(U2)
.tran 0 10u 1n UIC >nor-test.dat
.END

I explicit used MODE=DIG, but gnucap tried to find CMOSnor2 subcircuit
in the same way...

The output of gnucap is:

Gnucap 2006.07.07 RCS 25.93
The Gnu Circuit Analysis Package
Never trust any version less than 1.0
Copyright 1982-2002, Albert Davis
Gnucap comes with ABSOLUTELY NO WARRANTY
This is free software, and you are welcome
to redistribute it under certain conditions
according to the GNU General Public License.
See the file "COPYING" for details.
* nor-test
can't find subckt: CMOSnor2
U2: no model, forcing digital
can't find subckt: CMOSnor2
U1: no model, forcing digital
Segmentation fault


Someone else tried to use a TTL subcircuit for the NOR gates, but he got
a segfault too.

If it is necessary to make more tests for this flip-flop, please let me
know. Maybe the recursion is being a problem...

Regards,
Betoes