[Help-gnucap] Convergence Failure

[Crispy]

Hello,

I'm trying to make a simulation of a Tesla coil circuit with an
interesting type of spark gap, but am having trouble.  Currently many of
the components don't have exact values or are approximations for real
behavior, but I can fix that as soon as I have the basic simulation
running.  I have a voltage source operating at 60Hz, but I need a switch
that is similar to a SPDT relay switching back and forth at a given
frequency.  I thought I could implement this as two voltage controlled
switches and a sinusoidal voltage source, but I'm getting errors when I
run it.  The section of the netlist that does this is the RGAP
subcircuit.  The parameters to the subcircuit are, in order, one switch
node, the common switch node, the other switch node, and a ground/zero
node connection.  The errors are:

storage element step control error:Ldbl 5.47113e-13
using Euler, disabling time step control
very backward time step
convergence failure, reducing (itl4)
newtime=5.208333e-03  rejectedtime=5.208333e-03  oldtime=5.208333e-03
using=5.208333e-03
tried everything, still doesn't work, giving up

I've tried this with both Gnucap 0.35 and Gnucap 2007.03.29 RCS 26.22 .
The whole netlist file is:

DC Tesla Coil Simulation
.MODEL DHV         D(BV=25000)
.MODEL GAPSWITCH1  SW(VT=500 RON=100 ROFF=1e9)
.MODEL GAPSWITCH2  SW(VT=-500 RON=1e9 ROFF=100)
Xnst      1   0   2              NST15KV
Rnstmeas  1   2                  10GOhms
Xrect     1   2   3   4          HVRECTIFIER1
Csmooth   3   4                  400nF IC=0
Rsmooth   3   4                  25.9MEGOhms
DdeQ      3   5                  DHV
Ldbl      4   6                  20mH IC=0
Xgap      5   7   8   0          RGAP
Ctank     7   6                  2nF IC=0
Rleak     7   6                  10MEGOhms
Ltank     8   9                  5uH
Rtank     9   6                  1kOhms
.SUBCKT RGAP 3 4 5 6
V1 1 2 SIN(0 1000 80)
Rgnd 1 6 10MEGOhm
S1 3 4 1 2 GAPSWITCH1 OFF
S2 5 4 1 2 GAPSWITCH2 OFF
.ENDS
.SUBCKT NST15KV 4 2 5
Vtrans1      1  2   SIN(0 10607 60)
Vtrans2      3  2   SIN(0 -10607 60)
R1           1  4   300
R2           3  5   300
.ENDS
.SUBCKT HVRECTIFIER1 1 3 2 4
D1 1 2 DHV
D2 3 2 DHV
D3 4 3 DHV
D4 4 1 DHV
.ENDS
.options vmin=-1e9 vmax=1e9
.print tran vout(Rnstmeas) vout(Csmooth) i(R1.Xnst)
.tran .0001 1.05 1 UIC > primary.out
.end




Any help is greatly appreciated,
Chris