[Help-gnucap] Bug? convergence problem?

[Orestes Mas]

Hello,

I'm facing a weird result when I simulate a simple inverter amplifier built 
around an operational amplifier. Basically I'm trying to obtain the input-
output transfer characteristic (for educational purposes), but if the number 
of points in the DC command is low, I obtain an spurious peak at the output.

The circuit is:

-------
.INCLUDE uA741.model
Vcc 4 0 DC 15
Vdd 0 5 DC 15
vg 1 0 DC 2.5
R1 1 2 2.2k
R2 2 3 15k
X1 0 2 4 5 3 uA741
.PRINT DC v(3)
.DC vg -5 5 0.5
.END
---------

If you simulate that you'll see an output peak of -17V for the Vg=2.5V input.

**********>>> NOTE: Using the "OP" command yelds the correct solution (or a 
more plausible one) of -14.613V ************

I need some help to determine if this strange behaviour is originated by a bug 
in gnucap, an expectable convergence issue, or a wrong macromodel adaption 
(see below)

Can anyone help me? Thanks in advance.


(((More info: The AO macromodel is the pspice one slightly modified to make it 
work on gnucap. Here is the file:

*-------------------------------------------------------------------------------
* Library of linear IC definitions

* This is a reduced version of MicroSim's linear subcircuit library.
* You are welcome to make as many copies of it as you find convenient.
*
* The parameters in the opamp library were derived from the data sheets for
* each part.  The macromodel used is similar to the one described in:
*
*       Macromodeling of Integrated Circuit Operational Amplifiers
*         by Graeme Boyle, Barry Cohn, Donald Pederson, and James Solomon
*       IEEE Journal of SoliE-State Circuits, Vol. SC-9, no. 6, Dec. 1974
*
* Differences from the reference (above) occur in the output limiting stage
* which was modified to reduce internally generated currents associated with
* output voltage limiting, as well as short-circuit current limiting.
*
* The opamps are modelled at room temperature and do not track changes with
* temperature.  This library file contains models for nominal, not worst case,
* devices.
*
*$
*-----------------------------------------------------------------------------
* connections:   non-inverting input
*                |  inverting input
*                |  |  positive power supply
*                |  |  |  negative power supply
*                |  |  |  |  output
*                |  |  |  |  |
.subckt uA741    1  2  3  4  5
*
  c1   11 12 8.661E-12
  c2    6  7 30.00E-12
  dc    5 53 dx
  de   54  5 dx
  dlp  90 91 dx
  dln  92 90 dx
  dp    4  3 dx
* POLY font rewritten to make it work under gnucap
* egnd 99  0 poly(2) (3,0) (4,0) 0 .5 .5
egnd1 99 98 3 0 .5
egnd2 98 0 4 0 .5
* POLY font rewritten to make it work under gnucap
* fb    7 99 poly(5) vb vc ve vlp vln 0 10.61E6 -10E6 10E6 10E6 -10E6
  fb1   7 99 vb 10.61E6
  fb2   7 99 vc -10E6
  fb3   7 99 ve 10E6
  fb4   7 99 vlp 10E6
  fb5   7 99 vln -10E6
  ga    6  0 11 12 188.5E-6
  gcm   0  6 10 99 5.961E-9
  iee  10  4 dc 15.16E-6
  hlim 90  0 vlim 1K
  q1   11  2 13 qx
  q2   12  1 14 qx
  r2    6  9 100.0E3
  rc1   3 11 5.305E3
  rc2   3 12 5.305E3
  re1  13 10 1.836E3
  re2  14 10 1.836E3
  ree  10 99 13.19E6
  ro1   8  5 50
  ro2   7 99 100
  rp    3  4 18.16E3
  vb    9  0 dc 0
  vc    3 53 dc 1
  ve   54  4 dc 1
  vlim  7  8 dc 0
  vlp  91  0 dc 40
  vln   0 92 dc 40
.model dx D(Is=800.0E-18 Rs=1)
.model qx NPN(Is=800.0E-18 Bf=93.75)
.ends