Re: [Help-gnucap] subcircuits and speed

[al davis]

On Sunday 15 January 2012, Paul Reichl wrote:
> I am fairly new to gnucap and spice and I have a question
> regarding the  use of subcircuits and the solution times
> when using them. I have a circuit network with about 500 or
> so sets of either; R and L, R, L and C, or R, L, C and
> I,  elements in series. If I perform an AC analysis when
> using this circuit it takes only about 3 seconds to run
> (which is great:-) ).
> 
> However, if the same circuit is written in terms of a number
> of  subcircuits (essentially RL subcircuits, RLC subcircuits
> and RLCI subcircuits, with roughly 500 or so subcircuit
> elements in total) and I performs the same AC analysis
> again, it now takes roughly 1500 seconds to run. (i.e. the
> same analysis with the same underlying circuit when using
> subcircuits is roughly 500 times slower than the one done
> without using them).

My first thought was that it should run faster with subcircuits.  
Then looking closer, I see why ...

Nearly all of the performance optimization in gnucap is in the 
transient analysis.  The AC analysis is just the spice 
algorithm, nothing special.  Actually, in this case, it is a 
little worse than the spice algorithm.

Actually ... the gnucap model of an inductor is more efficient 
than in spice because gnucap doesn't add an internal node.  But 
still, it's the same algorithm.

The passive elements you are using take almost no time to solve.  
Most of the time spent is on overhead. .. stepping through 
lists, etc.  With subcircuits, you add an extra layer of 
overhead.

Also, the matrix formation is likely to be different.  In 
general, maybe better, maybe worse.  In this case, without 
seeing your actual circuit, but guessing ..  Probably without 
subcircuits it forms into a narrow band matrix, which is the 
most efficient form, but with subcircuits it gives you more of a 
"bordered block diagonal" form, which is less efficient 
nominally, but enables the partial solution mechanism that 
speeds up transient analysis.  This doesn't help if your circuit 
cannot take advantage of it.  If this is a factor, you could 
improve the time by making all subcircuit nodes external.

If you ask for "status" you can get info on where the time is 
going.  Try it both ways and compare.  Can you try that and post 
the "status" both ways?

It would also be interesting to see the comparison of two 
circuits, one twice the size of the other, but otherwise the 
same.

Tips to improve it  ....

If you are so inclined, the best way to improve the run time is 
to make plugins that implement the combinations you use as 
single elements without internal nodes.  Making such optimized 
models is not easy, but can be done.  There is work in progress 
on porting the ADMS model compiler, but I don't think it will 
help with the simple devices.