problerm using eval

[hans . peter . van . lohuizen]

Any hints for my earlier posted question as put below?
I tried to rewrite my make script with an eval statement to prevent include commands
since our environment prefers not to have additional files.
But somehow the extra rule is not included now. 
Below my trial, what could be wrong? I like to learn from this.
(below my original setup with include) 

 ===================
new setup with eval:
===================
 MODULES = Mod1 Mod2..... 
 MOD_PATH = $(foreach OBJ,$(MODULES),../../$(OBJ)/synopsys) 
define ADD_rules 
       $(1)/ddb/generic.db : $(1)/$(wildcard /cmd/*specific.tcl ) 
 endef 

 $(foreach mod,$(MOD_PATH),$(eval $(call ADD_rules,$(mod)) ) )

%ddb/generic.db : %cmd/dc_setup.tcl \ 
                                      %cmd/generic.tcl 
        commands..... 

===================
Original setup with include:
===================
 MODULES = Mod1 Mod2..... 
 MOD_PATH = $(foreach OBJ,$(MODULES),../../$(OBJ)/synopsys) 

 .generated.mk : makefile 
        @rm -rf $@ 
        @for t in $(MOD_PATH); do \ 
                print "$$t/ddb/generic.db : \\"                                   >>$@;\ 
                print "       \$$(wildcard $$t/cmd/*specific.tcl) \\"  >>$@;\ 
        done 

 include .generated.mk 

 %ddb/generic.db : %cmd/dc_setup.tcl \ 
                                      %cmd/generic.tcl 
        commands..... 




Thanks a lot!! 


Hans Peter. _______________________________________________
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