Static Pattern Rules: target, stem, and prerequisite issue

[Martin Gaarde Lund]

Hello make experts,

I have a problem working with static pattern rules which seems to reveal the limits of the current static pattern rule implementation.

Here is an example snip from a nonrecursive makefile Im trying to build up.

= makefile snip =============================================

BUILDDIR = build/obj
C_OBJ_LIST_BUILD := $(BUILDDIR)/project1/src/prog1.o \
                   $(BUILDDIR)/project2/src/prog2.o

$(C_OBJ_LIST_BUILD): %.o: $(subst $(OBJDIR)/,,%.c)
    do compile action etc...

=============================================================

Make fails with no rule to make target 'build/obj/project1/src/prog1.o' required by 'build/obj/project1/src/prog1.o'.

This indicates that the subst function did not remove the 'build/src/' string so that the prerequisite would be correct: 'project1/src/prog1.c' (which is the correct source path relative to where make is fired).

At start I was a bit puzzled why it did not replace correctly. I read in the documentation and I think this is because patterns are not expanded at the right time when the makefile is read.

Question is if there is any way to make this static pattern rule work as I intend it to or if it need to be entirely rewritten??

It would be very nice if it was possible to manipulate the prerequisite in a static pattern rule like this. This will in my case give the ability to very easy seperate the target files from the prerequisite files when building.

Any help/hints is appreciated.

/Martin