Expanding a variable in the dependencies

[Or Goshen]

Hi

I have the following make file:
TEST_LO=test.lo
 
%.so: $($*_LO)
        $(CC) $(LDFLAGS) -shared -Wl,-soname,$*.so.0 -o $*.so $($*_LO)
 
%.lo: %.c
        $(CC) $(CFLAGS) -fPIC -o $*.lo -c $*.c

When I execute "make TEST.so" I get:
$ make TEST.so
gcc -shared -Wl,-soname,TEST.so.0 -o TEST.so test.lo
gcc: test.lo: No such file or directory
make: *** [TEST.so
] Error 1
My question is - why doesnt it expand "$($*_LO)" in the dependencies as well ?
(I got the file "test.c" in the directory)