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Re: some questin about Makefile


From: Paul Smith
Subject: Re: some questin about Makefile
Date: Wed, 16 Sep 2009 10:19:55 -0400

On Wed, 2009-09-16 at 21:46 +0800, loody wrote:

> SRCDIR    = $(ROOT) ./device/display ./device/fatfs ./device/misc
> VPATH = ${SRCDIR}

> OBJ_C = cpufunc.o Interrupt.o main.o memtst.o ntsys.o Display.o
> diskio.o FileSystem.o tff.o misc.o
> OBJ = cpufunc.o Interrupt.o main.o memtst.o ntsys.o Display.o diskio.o
> FileSystem.o tff.o misc.o
> 
> .PHONY : all clear depend
> all: $(OBJ)
> $(OBJ_C) : %.o : %.c

> my question are:
> 1. what does the pattern rule of "OBJ_C : %.o : %.c" mean?

Look up static pattern rules in the GNU make manual.

> 2. I purposely assign the member of OBJ_C without directories, but why
> the output of $< still has directories?

Look up VPATH in the GNU make manual.

> 3. the prerequisite of all is $(OBJ), but why make find $(OBJ_C) as
> the prerequisite for execution?

See question #1 above: these two questions have the same answer.

Let us know if you read these and don't understand what's going on... 

-- 
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 Paul D. Smith <address@hidden>          Find some GNU make tips at:
 http://www.gnu.org                      http://make.mad-scientist.net
 "Please remain calm...I may be mad, but I am a professional." --Mad Scientist




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