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Make in object subdirectory, from SDK Root


From: chalecampb
Subject: Make in object subdirectory, from SDK Root
Date: Tue, 19 May 2015 11:24:44 -0700 (PDT)

Hello,

I am co-opting a makefile from the nRF51 SDK. There are a few options for
existing makefiles, but in general, the approach is to either

1. Use the SDK, put your new project in their SDK, and use relative paths
(?!)
2. Manually copy all required .c/.h files to your own directory, and use
make within that folder only

I thought it would be better to create a makefile which used an environment
variable to point to the SDK install directory, in the same way that I've
seen virtually every other SDK work. However, not being terribly familiar
with Make, I am having some issues with things that should be easy.

The particular problem I'm having is that -

1. When the list of required sources is created, they are all absolute
paths. Because the .o files are not created at those paths, but instead at
the _build directory, we create a list of object dependencies in _build from
the original source files
2. Because the path information is lost when we convert the sources list to
the objects list, make is unable to find the source and stops. This is the
object dependency in the Makefile - 

# Create objects from C SRC files
$(OBJECT_DIRECTORY)/%.o: %.c
        @echo Compiling file: $(notdir $<)
        $(NO_ECHO)$(CC) $(CFLAGS) $(INC_PATHS) -c -o $@ $<

3. What we *need* is a way to say that for a given %.o, we find a %.c which
matches the *absolute path* of that file as given in the C sources list
3. Now, the solution (it seems, for me) is because the .o corresponds 1:1
with the original C file, I wanted to use a filter to select the absolute
path of the C file from the C sources list given the name of the .c file.  

# Create objects from C SRC files
$(OBJECT_DIRECTORY)/%.o: $(filter $(patsubst %.o, %.c, $(notdir $@)),
$(C_SOURCE_FILES))
        @echo Compiling file: $(notdir $<)
        $(NO_ECHO)$(CC) $(CFLAGS) $(INC_PATHS) -c -o $@ $<

My understanding of this recipe - 

1. If we need to make %.o, the rule is,
2. $@ is equal to _build/app_scheduler.o
3. Use $(notdir $@) to get just app_scheduler.o
4. Substitute .c for .o - rest of function is $(filter app_scheduler.c,
$(C_SOURCE_FILES))
5. $(C_SOURCE_FILES) contains the line
c:/nrf51SDK/components/libraries/scheduler/app_scheduler.c
6. Therefore, $(filter ...) should return
"c:/nrf51SDK/components/libraries/scheduler/app_scheduler.c"
7. Total rule is _build/app_scheduler.o:
c:/nrf51SDK/components/libraries/scheduler/app_scheduler.c [...]

This doesn't work - it just compiles the first C file over and over again.
I've determined that the patsubst works great - I can get the name of each C
file. Then, when I do $(filter %app_scheduler.c, $(C_SOURCE_FILES)), the
result is equal to $(C_SOURCE_FILES) despite app_scheduler.c not appearing
in more than 1 list item. Why is this happening?

The expected behavior would be $(filter %a.c, alpha.c bravo.c charlie.c)
returning alpha.c, not "alpha.c bravo.c charlie.c". 

Is there something I'm doing wrong? Is there an easier way to do this?

Thanks for any advice.
-Alex




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