debugging make variables using $(SHELL)

[russ mok [Alumni]]

Hi Duane

My env relies heavily on recursive make, and my last rule is for debugging:

# the subst below allows using .VARIABLES
# the filter on .VARIABLES is to allow use of patterns instead of just variable 
names
# the filter on MAKELEVEL stops at a particular level of submake. Early stop of 
make process can be done by exit 1 in the debug-shell
debug-shell:
$(if $(filter $(debuglevels),$(MAKELEVEL)),$(foreach v,$(filter 
$(debugvars),$(.VARIABLES)),$(subst .,dot,$(v))="$(strip $($(v)))") $(SHELL) 
-i,@true)

I am invoking a shell -- an idea I picked up from another guru many years ago.

Inside this shell, you can try other ways to trouble shoot, like 'make -p -q' . 
It is possible I cannot get the shell if $(v) expands to something 
incompatible, but I still can see what is going on.

target specific variable definition is still difficult, and I dump what the 
definition uses. Also note that I don't use $(value blah). See if you can get 
by with 'lazy-dumping' the variables and remove the 'reload'.

Btw, I don't mind having huge output because I run bash inside emacs.

cheers
Russell

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Today's Topics:

   1. Re: Looking for nastiest makefile that uses function calls to
      make      the makefile in memory... (Duane Griffin)


----------------------------------------------------------------------

Message: 1
Date: Mon, 20 Mar 2017 12:22:16 +1300
From: Duane Griffin <address@hidden>
To: Brian Cowan <address@hidden>
Cc: make-help mailing list <address@hidden>
Subject: Re: Looking for nastiest makefile that uses function calls to
        make    the makefile in memory...
Message-ID:
        <address@hidden>
Content-Type: text/plain; charset="utf-8"

You want complex GNU makefiles? Alrighty then...

Please find attached a small piece of our build system. It emulates local
variables, essentially by saving the values of all variables prior to a
makefile being included, then restoring them and clearing any new ones
after. I wrote it to help us find bugs in and make our large (~20k LoC) and
very complex build system more robust.

As an aside -- if anyone has any ideas on how to do this better and/or
faster (it is very slow, ~doubling my no-op build times) I'd be very happy
to hear them.

I've been meaning to publish the full build system framework itself as
open-source for ages (and I have agreement from my senior management to do
that), but that requires first separating it into generic and
build-specific parts, and ensuring none of our company-specific or
proprietary bits are left in the former. Since it is so large and complex
this is not easy. This bit, however, is already generic and should be
usable on its own.

Cheers,
Duane.

On Sat, Mar 18, 2017 at 5:45 AM, Brian Cowan <address@hidden> wrote:

> I'm chasing down use cases for the $(call and $(eval functions to
> effectively build the makefile from macros in the makefile (or included
> files). I'm looking to stress-test the make tool I support, which supports
> GNU make syntax, but I'm finding that elementary usecases don't always
> suffice. So, if someone knows of a makefile-from-h**l they have fought
> with, I'd love to hear about it... If its in an open-source project, that
> would be even better...
>
>
> =============================================================
> Brian Cowan
> ClearCase/Licensing Software Advisory Team (SWAT)
> HCL Technologies at IBM
> IBM Cloud Support
> 550 King St
> Littleton MA 01460
>
> Phone: +1 978 899 5436
>
>
> _______________________________________________
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--
"I never could learn to drink that blood and call it wine" - Bob Dylan
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