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[Libunwind-devel] [PATCH 11/11] UPT: Add reg offsets for ppc32/64


From: Cody P Schafer
Subject: [Libunwind-devel] [PATCH 11/11] UPT: Add reg offsets for ppc32/64
Date: Mon, 10 Sep 2012 17:21:43 -0700

---
 src/ptrace/_UPT_reg_offset.c | 142 ++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 140 insertions(+), 2 deletions(-)

diff --git a/src/ptrace/_UPT_reg_offset.c b/src/ptrace/_UPT_reg_offset.c
index d6e1274..6259a93 100644
--- a/src/ptrace/_UPT_reg_offset.c
+++ b/src/ptrace/_UPT_reg_offset.c
@@ -335,8 +335,146 @@ int _UPT_reg_offset[UNW_REG_LAST + 1] =
 #else
 #error Port me
 #endif
-#elif defined(UNW_TARGET_PPC32)
-#elif defined(UNW_TARGET_PPC64)
+#elif defined(UNW_TARGET_PPC32) || defined(UNW_TARGET_PPC64)
+
+#define UNW_FP_OFF(b, i)    \
+    [UNW_PPC##b##_F##i] = PT_FPR0 + i * 8/sizeof(unsigned long)
+
+#define UNW_PPC_REGS(b) \
+    [UNW_PPC##b##_R0] = PT_R0, \
+    [UNW_PPC##b##_R1] = PT_R1, \
+    [UNW_PPC##b##_R2] = PT_R2, \
+    [UNW_PPC##b##_R3] = PT_R3, \
+    [UNW_PPC##b##_R4] = PT_R4, \
+    [UNW_PPC##b##_R5] = PT_R5, \
+    [UNW_PPC##b##_R6] = PT_R6, \
+    [UNW_PPC##b##_R7] = PT_R7, \
+    [UNW_PPC##b##_R8] = PT_R8, \
+    [UNW_PPC##b##_R9] = PT_R9, \
+    [UNW_PPC##b##_R10] = PT_R10, \
+    [UNW_PPC##b##_R11] = PT_R11, \
+    [UNW_PPC##b##_R12] = PT_R12, \
+    [UNW_PPC##b##_R13] = PT_R13, \
+    [UNW_PPC##b##_R14] = PT_R14, \
+    [UNW_PPC##b##_R15] = PT_R15, \
+    [UNW_PPC##b##_R16] = PT_R16, \
+    [UNW_PPC##b##_R17] = PT_R17, \
+    [UNW_PPC##b##_R18] = PT_R18, \
+    [UNW_PPC##b##_R19] = PT_R19, \
+    [UNW_PPC##b##_R20] = PT_R20, \
+    [UNW_PPC##b##_R21] = PT_R21, \
+    [UNW_PPC##b##_R22] = PT_R22, \
+    [UNW_PPC##b##_R23] = PT_R23, \
+    [UNW_PPC##b##_R24] = PT_R24, \
+    [UNW_PPC##b##_R25] = PT_R25, \
+    [UNW_PPC##b##_R26] = PT_R26, \
+    [UNW_PPC##b##_R27] = PT_R27, \
+    [UNW_PPC##b##_R28] = PT_R28, \
+    [UNW_PPC##b##_R29] = PT_R29, \
+    [UNW_PPC##b##_R30] = PT_R30, \
+    [UNW_PPC##b##_R31] = PT_R31, \
+                               \
+    [UNW_PPC##b##_CTR] = PT_CTR, \
+    [UNW_PPC##b##_XER] = PT_XER, \
+    [UNW_PPC##b##_LR]  = PT_LNK, \
+                               \
+    UNW_FP_OFF(b, 0), \
+    UNW_FP_OFF(b, 1), \
+    UNW_FP_OFF(b, 2), \
+    UNW_FP_OFF(b, 3), \
+    UNW_FP_OFF(b, 4), \
+    UNW_FP_OFF(b, 5), \
+    UNW_FP_OFF(b, 6), \
+    UNW_FP_OFF(b, 7), \
+    UNW_FP_OFF(b, 8), \
+    UNW_FP_OFF(b, 9), \
+    UNW_FP_OFF(b, 10), \
+    UNW_FP_OFF(b, 11), \
+    UNW_FP_OFF(b, 12), \
+    UNW_FP_OFF(b, 13), \
+    UNW_FP_OFF(b, 14), \
+    UNW_FP_OFF(b, 15), \
+    UNW_FP_OFF(b, 16), \
+    UNW_FP_OFF(b, 17), \
+    UNW_FP_OFF(b, 18), \
+    UNW_FP_OFF(b, 19), \
+    UNW_FP_OFF(b, 20), \
+    UNW_FP_OFF(b, 21), \
+    UNW_FP_OFF(b, 22), \
+    UNW_FP_OFF(b, 23), \
+    UNW_FP_OFF(b, 24), \
+    UNW_FP_OFF(b, 25), \
+    UNW_FP_OFF(b, 26), \
+    UNW_FP_OFF(b, 27), \
+    UNW_FP_OFF(b, 28), \
+    UNW_FP_OFF(b, 29), \
+    UNW_FP_OFF(b, 30), \
+    UNW_FP_OFF(b, 31)
+
+#define UNW_PPC32_REGS \
+    [UNW_PPC##b##_FPSCR] = PT_FPSCR, \
+    [UNW_PPC##b##_CCR] = PT_CCR
+
+#define UNW_VR_OFF(i)  \
+    [UNW_PPC64_V##i] = PT_VR0 + i * 2
+
+#define UNW_PPC64_REGS \
+    [UNW_PPC64_NIP] = PT_NIP,       \
+    [UNW_PPC64_FRAME_POINTER] = -1, \
+    [UNW_PPC64_ARG_POINTER] = -1,   \
+    [UNW_PPC64_CR0] = -1,           \
+    [UNW_PPC64_CR1] = -1,           \
+    [UNW_PPC64_CR2] = -1,           \
+    [UNW_PPC64_CR3] = -1,           \
+    [UNW_PPC64_CR4] = -1,           \
+    [UNW_PPC64_CR5] = -1,           \
+    [UNW_PPC64_CR6] = -1,           \
+    [UNW_PPC64_CR7] = -1,           \
+    [UNW_PPC64_VRSAVE] = PT_VRSAVE, \
+    [UNW_PPC64_VSCR] = PT_VSCR,     \
+    [UNW_PPC64_SPE_ACC] = -1,       \
+    [UNW_PPC64_SPEFSCR] = -1,       \
+    UNW_VR_OFF(0), \
+    UNW_VR_OFF(1), \
+    UNW_VR_OFF(2), \
+    UNW_VR_OFF(3), \
+    UNW_VR_OFF(4), \
+    UNW_VR_OFF(5), \
+    UNW_VR_OFF(6), \
+    UNW_VR_OFF(7), \
+    UNW_VR_OFF(8), \
+    UNW_VR_OFF(9), \
+    UNW_VR_OFF(10), \
+    UNW_VR_OFF(11), \
+    UNW_VR_OFF(12), \
+    UNW_VR_OFF(13), \
+    UNW_VR_OFF(14), \
+    UNW_VR_OFF(15), \
+    UNW_VR_OFF(16), \
+    UNW_VR_OFF(17), \
+    UNW_VR_OFF(18), \
+    UNW_VR_OFF(19), \
+    UNW_VR_OFF(20), \
+    UNW_VR_OFF(21), \
+    UNW_VR_OFF(22), \
+    UNW_VR_OFF(23), \
+    UNW_VR_OFF(24), \
+    UNW_VR_OFF(25), \
+    UNW_VR_OFF(26), \
+    UNW_VR_OFF(27), \
+    UNW_VR_OFF(28), \
+    UNW_VR_OFF(29), \
+    UNW_VR_OFF(30), \
+    UNW_VR_OFF(31)
+
+#if defined(UNW_TARGET_PPC32)
+    UNW_PPC_REGS(32),
+    UNW_PPC32_REGS,
+#else
+    UNW_PPC_REGS(64),
+    UNW_PPC64_REGS,
+#endif
+
 #elif defined(UNW_TARGET_ARM)
     [UNW_ARM_R0]       = 0x00,
     [UNW_ARM_R1]       = 0x04,
-- 
1.7.11.3




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