Scheme Coprocessor (Deuxieme partie)

[Scheming Pony]

The project I'm working on (a Libre CPU) could benefit from a symbolic 
coprocessor.  I thought MIT/Scheme would be a candidate for a prototype, 
running directly on one of the CPU cores.

What would it take MIT/Scheme run on a bare metal CPU (RISC-V or PowerPC) from 
ROM?  I'm guessing it would at least need some (hopefully) minimal Posix 
support.

Has this been done before?  CL has Mezzano, as a demonstration of this concept. 
The CPU will be running at 300 MHz, and there should be adequate memory--640K 
should be enough for a PC right?

-- Stewart Milberger