[openap-cvs] : linux/drivers/char serial.c,1.1.1.1,1.2

[David C Wang <address@hidden>]

Update of /cvsroot/openap/linux/drivers/char
In directory subversions:/tmp/cvs-serv5742/drivers/char

Modified Files:
        serial.c 
Log Message:
updated linux kernel pristine sources to openap release 1.1



Index: serial.c
===================================================================
RCS file: /cvsroot/openap/linux/drivers/char/serial.c,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -u -r1.1.1.1 -r1.2
--- serial.c    14 May 2002 18:34:59 -0000      1.1.1.1
+++ serial.c    14 May 2002 19:53:30 -0000      1.2
@@ -881,6 +881,7 @@
 {
        int status;
        int pass_counter = 0;
+       int iir;
        struct async_struct * info;
 #ifdef CONFIG_SERIAL_MULTIPORT 
        int first_multi = 0;
@@ -901,6 +902,7 @@
                first_multi = inb(multi->port_monitor);
 #endif
 
+       iir = serial_in(info, UART_IIR);
        do {
                status = serial_inp(info, UART_LSR);
 #ifdef SERIAL_DEBUG_INTR
@@ -909,8 +911,18 @@
                if (status & UART_LSR_DR)
                        receive_chars(info, &status, regs);
                check_modem_status(info);
+#ifdef CONFIG_AMD_ELAN
+               /* There is a bug in the UART on the AMD Elan SC4x0
+                 embedded processor series; the THRE bit of the line
+                 status register seems to be delayed one bit clock after
+                 the interrupt is generated, so kludge this if the
+                 IIR indicates a Transmit Holding Register Interrupt */
+               if (status & UART_LSR_THRE || (iir & UART_IIR_ID) == 
UART_IIR_THRI)
+                       transmit_chars(info, 0);
+#else
                if (status & UART_LSR_THRE)
                        transmit_chars(info, 0);
+#endif
                if (pass_counter++ > RS_ISR_PASS_LIMIT) {
 #if 0
                        printk("rs_single loop break.\n");