Re: [Qemu-arm] [PATCH 12/42] target/arm: Convert "double-precision" register moves to decodetree

[Richard Henderson]

On 6/6/19 12:45 PM, Peter Maydell wrote:
> Convert the "double-precision" register moves to decodetree:
> this covers VMOV scalar-to-gpreg, VMOV gpreg-to-scalar and VDUP.
> 
> Note that the conversion process has tightened up a few of the
> UNDEF encoding checks: we now correctly forbid:
>  * VMOV-to-gpr with U:opc1:opc2 == 10x00 or x0x10
>  * VMOV-from-gpr with opc1:opc2 == 0x10
>  * VDUP with B:E == 11
>  * VDUP with Q == 1 and Vn<0> == 1
> 
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> The accesses of elements < 32 bits could be improved by doing
> direct ld/st of the right size rather than 32-bit read-and-shift
> or read-modify-write, but we leave this for later cleanup,
> since this series is generally trying to stick to fixing
> the decode.
> --
Reviewed-by: Richard Henderson <address@hidden>


r~