Re: [Qemu-arm] [PATCH 2/2] aspeed: add a GPIO controller to the SoC

[Rashmica Gupta]

On Tue, 2019-06-18 at 11:21 +0200, Cédric Le Goater wrote:
> On 18/06/2019 10:51, Rashmica Gupta wrote:
> > Signed-off-by: Rashmica Gupta <address@hidden>
> > ---
> >  hw/arm/aspeed_soc.c         | 17 +++++++++++++++++
> >  include/hw/arm/aspeed_soc.h |  3 +++
> >  2 files changed, 20 insertions(+)
> > 
> > diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
> > index 1cc98b9f40..8583869acf 100644
> > --- a/hw/arm/aspeed_soc.c
> > +++ b/hw/arm/aspeed_soc.c
> > @@ -23,6 +23,7 @@
> >  #include "net/net.h"
> >  
> >  #define ASPEED_SOC_IOMEM_SIZE       0x00200000
> > +#define ASPEED_SOC_GPIO_BASE        0x1E780000
> > 
> 
> You should put this value in the memmap array.
>

Oops, good spot!

> C. 
> 
> 
> >  static const hwaddr aspeed_soc_ast2400_memmap[] = {
> >      [ASPEED_IOMEM]  = 0x1E600000,
> > @@ -120,6 +121,7 @@ static const AspeedSoCInfo aspeed_socs[] = {
> >          .spis_num     = 1,
> >          .fmc_typename = "aspeed.smc.fmc",
> >          .spi_typename = aspeed_soc_ast2400_typenames,
> > +        .gpio_typename = "aspeed.gpio-ast2400",
> >          .wdts_num     = 2,
> >          .irqmap       = aspeed_soc_ast2400_irqmap,
> >          .memmap       = aspeed_soc_ast2400_memmap,
> > @@ -131,6 +133,7 @@ static const AspeedSoCInfo aspeed_socs[] = {
> >          .spis_num     = 1,
> >          .fmc_typename = "aspeed.smc.fmc",
> >          .spi_typename = aspeed_soc_ast2400_typenames,
> > +        .gpio_typename = "aspeed.gpio-ast2400",
> >          .wdts_num     = 2,
> >          .irqmap       = aspeed_soc_ast2400_irqmap,
> >          .memmap       = aspeed_soc_ast2400_memmap,
> > @@ -142,6 +145,7 @@ static const AspeedSoCInfo aspeed_socs[] = {
> >          .spis_num     = 1,
> >          .fmc_typename = "aspeed.smc.fmc",
> >          .spi_typename = aspeed_soc_ast2400_typenames,
> > +        .gpio_typename = "aspeed.gpio-ast2400",
> >          .wdts_num     = 2,
> >          .irqmap       = aspeed_soc_ast2400_irqmap,
> >          .memmap       = aspeed_soc_ast2400_memmap,
> > @@ -153,6 +157,7 @@ static const AspeedSoCInfo aspeed_socs[] = {
> >          .spis_num     = 2,
> >          .fmc_typename = "aspeed.smc.ast2500-fmc",
> >          .spi_typename = aspeed_soc_ast2500_typenames,
> > +        .gpio_typename = "aspeed.gpio-ast2500",
> >          .wdts_num     = 3,
> >          .irqmap       = aspeed_soc_ast2500_irqmap,
> >          .memmap       = aspeed_soc_ast2500_memmap,
> > @@ -225,6 +230,8 @@ static void aspeed_soc_init(Object *obj)
> >  
> >      sysbus_init_child_obj(obj, "ftgmac100", OBJECT(&s->ftgmac100),
> >                            sizeof(s->ftgmac100), TYPE_FTGMAC100);
> > +    sysbus_init_child_obj(obj, "gpio", OBJECT(&s->gpio), sizeof(s-
> > >gpio),
> > +                          sc->info->gpio_typename);
> >  }
> >  
> >  static void aspeed_soc_realize(DeviceState *dev, Error **errp)
> > @@ -366,6 +373,16 @@ static void aspeed_soc_realize(DeviceState
> > *dev, Error **errp)
> >                      sc->info->memmap[ASPEED_ETH1]);
> >      sysbus_connect_irq(SYS_BUS_DEVICE(&s->ftgmac100), 0,
> >                         aspeed_soc_get_irq(s, ASPEED_ETH1));
> > +
> > +    /* GPIO */
> > +    object_property_set_bool(OBJECT(&s->gpio), true, "realized",
> > &err);
> > +    if (err) {
> > +        error_propagate(errp, err);
> > +        return;
> > +    }
> > +    sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0,
> > ASPEED_SOC_GPIO_BASE);
> > +    sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0,
> > +            qdev_get_gpio_in(DEVICE(&s->vic), 20));
> >  }
> >  
> >  static void aspeed_soc_class_init(ObjectClass *oc, void *data)
> > diff --git a/include/hw/arm/aspeed_soc.h
> > b/include/hw/arm/aspeed_soc.h
> > index 88b901d5df..28ff2bedb4 100644
> > --- a/include/hw/arm/aspeed_soc.h
> > +++ b/include/hw/arm/aspeed_soc.h
> > @@ -20,6 +20,7 @@
> >  #include "hw/ssi/aspeed_smc.h"
> >  #include "hw/watchdog/wdt_aspeed.h"
> >  #include "hw/net/ftgmac100.h"
> > +#include "hw/gpio/aspeed_gpio.h"
> >  
> >  #define ASPEED_SPIS_NUM  2
> >  #define ASPEED_WDTS_NUM  3
> > @@ -40,6 +41,7 @@ typedef struct AspeedSoCState {
> >      AspeedSDMCState sdmc;
> >      AspeedWDTState wdt[ASPEED_WDTS_NUM];
> >      FTGMAC100State ftgmac100;
> > +    AspeedGPIOState gpio;
> >  } AspeedSoCState;
> >  
> >  #define TYPE_ASPEED_SOC "aspeed-soc"
> > @@ -53,6 +55,7 @@ typedef struct AspeedSoCInfo {
> >      int spis_num;
> >      const char *fmc_typename;
> >      const char **spi_typename;
> > +    const char *gpio_typename;
> >      int wdts_num;
> >      const int *irqmap;
> >      const hwaddr *memmap;
> > 
> 
>