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Re: [PATCH v7 17/20] target/arm: Rebuild hflags at MSR writes
From: |
Peter Maydell |
Subject: |
Re: [PATCH v7 17/20] target/arm: Rebuild hflags at MSR writes |
Date: |
Fri, 18 Oct 2019 15:49:58 +0100 |
On Fri, 18 Oct 2019 at 15:30, Richard Henderson
<address@hidden> wrote:
>
> On 10/18/19 5:32 AM, Peter Maydell wrote:
> > On Thu, 17 Oct 2019 at 19:51, Richard Henderson
> > <address@hidden> wrote:
> > Why only rebuild hflags if !ARM_CP_SUPPRESS_TB_END ?
> > For instance on the Xscale CPUs we set SUPPRESS_TB_END for the SCTLR,
> > but some of the SCTLR bits are cached in hflags, right? Do we somehow
> > arrange to rebuild the hflags when the TB does eventually end ?
>
> No, we don't. I assumed that all registers which change TB flags would in
> fact
> end the TB.
>
> Why did we suppress tb end for Xscale?
The comment in helper.c explains:
/* Normally we would always end the TB on an SCTLR write, but Linux
* arch/arm/mach-pxa/sleep.S expects two instructions following
* an MMU enable to execute from cache. Imitate this behaviour.
*/
This refers to an older version of the kernel code than the current one:
https://elixir.bootlin.com/linux/v2.6.11/source/arch/arm/mach-pxa/sleep.S#L166
which assumed that the two insns after the SCTLR write that enables
the MMU run from cache and so don't need to actually be accessible
via the addresses that the pre-MMU-enable code runs from.
This bit of kernel magic eventually went away with commit 4f5ad99bb5331c57
(kernel v2.6.39) which converted the PXA to use the generic suspend/resume
support, which presumably handles the enable-the-MMU transition in a more
sensible fashion where the address it's executing from is valid
both before and after the MMU is enabled.
thanks
-- PMM
- [PATCH v7 05/20] target/arm: Split out rebuild_hflags_m32, (continued)
- [PATCH v7 05/20] target/arm: Split out rebuild_hflags_m32, Richard Henderson, 2019/10/17
- [PATCH v7 06/20] target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state, Richard Henderson, 2019/10/17
- [PATCH v7 07/20] target/arm: Split out rebuild_hflags_a32, Richard Henderson, 2019/10/17
- [PATCH v7 08/20] target/arm: Split out rebuild_hflags_aprofile, Richard Henderson, 2019/10/17
- [PATCH v7 10/20] target/arm: Simplify set of PSTATE_SS in cpu_get_tb_cpu_state, Richard Henderson, 2019/10/17
- [PATCH v7 09/20] target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state, Richard Henderson, 2019/10/17
- [PATCH v7 11/20] target/arm: Hoist computation of TBFLAG_A32.VFPEN, Richard Henderson, 2019/10/17
- [PATCH v7 17/20] target/arm: Rebuild hflags at MSR writes, Richard Henderson, 2019/10/17
- [PATCH v7 15/20] target/arm: Add HELPER(rebuild_hflags_{a32, a64, m32}), Richard Henderson, 2019/10/17
- [PATCH v7 13/20] target/arm: Split out arm_mmu_idx_el, Richard Henderson, 2019/10/17
- [PATCH v7 16/20] target/arm: Rebuild hflags at EL changes, Richard Henderson, 2019/10/17
- [PATCH v7 14/20] target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state, Richard Henderson, 2019/10/17
- [PATCH v7 18/20] target/arm: Rebuild hflags at CPSR writes, Richard Henderson, 2019/10/17
- [PATCH v7 19/20] target/arm: Rebuild hflags for M-profile., Richard Henderson, 2019/10/17