Re: [PATCH v20 0/5] Add ARMv8 RAS virtualization support in QEMU

[gengdongjiu]

Hi Michael/All

On 2019/10/27 18:17, Michael S. Tsirkin wrote:
> On Sat, Oct 26, 2019 at 11:24:42AM +0800, Xiang Zheng wrote:
>> In the ARMv8 platform, the CPU error types are synchronous external 
>> abort(SEA)
>> and SError Interrupt (SEI). If exception happens in guest, sometimes it's 
>> better
>> for guest to perform the recovery, because host does not know the detailed
>> information of guest. For example, if an exception happens in a user-space
>> application within guest, host does not know which application encounters
>> errors.
>>
>> For the ARMv8 SEA/SEI, KVM or host kernel delivers SIGBUS to notify 
>> userspace.
>> After user space gets the notification, it will record the CPER into guest 
>> GHES
>> buffer and inject an exception or IRQ into guest.
>>
>> In the current implementation, if the type of SIGBUS is BUS_MCEERR_AR, we 
>> will
>> treat it as a synchronous exception, and notify guest with ARMv8 SEA
>> notification type after recording CPER into guest.
>>
>> This series of patches are based on Qemu 4.1, which include two parts:
>> 1. Generate APEI/GHES table.
>> 2. Handle the SIGBUS signal, record the CPER in runtime and fill it into 
>> guest
>>    memory, then notify guest according to the type of SIGBUS.
>>
>> The whole solution was suggested by James(address@hidden); The solution of
>> APEI section was suggested by Laszlo(address@hidden).
>> Show some discussions in [1].
>>
>> This series of patches have already been tested on ARM64 platform with RAS
>> feature enabled:
>> Show the APEI part verification result in [2].
>> Show the BUS_MCEERR_AR SIGBUS handling verification result in [3].
> 
> This looks mostly OK to me.  I sent some minor style comments but they
> can be addressed by follow up patches.
> 
> Maybe it's a good idea to merge this before soft freeze to make sure it
> gets some testing.  I'll leave this decision to the ARM maintainer.  For
> ACPI parts:
> 
> Reviewed-by: Michael S. Tsirkin <address@hidden>

Got it, Thanks for the Reviewed-by from Michael.

Hi Michael,
  According to discussion with QEMU community, I finished and developed the 
whole ARM RAS virtualization solution, and introduce the ARM APEI table in the 
first time.
For the newly created files, which are mainly about ARM APEI/GHES part,I would 
like to maintain them. If you agree it, whether I can add new maintainers[1]? 
thanks a lot.


[1]:
+ARM APEI Subsystem
+M: Dongjiu Geng <address@hidden>
+M: Xiang zheng <address@hidden>
+L: address@hidden
+S: Maintained
+F: hw/acpi/acpi_ghes.c
+F: include/hw/acpi/acpi_ghes.h
+F: docs/specs/acpi_hest_ghes.rst


> 
> 
>> ---