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[PULL 08/20] target/arm: Add missing space in comment
From: |
Richard Henderson |
Subject: |
[PULL 08/20] target/arm: Add missing space in comment |
Date: |
Wed, 14 Sep 2022 12:52:05 +0100 |
From: Peter Maydell <peter.maydell@linaro.org>
Fix a missing space before a comment terminator.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220819110052.2942289-7-peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu_tcg.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c
index f63f8cdd95..b714c61d94 100644
--- a/target/arm/cpu_tcg.c
+++ b/target/arm/cpu_tcg.c
@@ -64,7 +64,7 @@ void aa32_max_features(ARMCPU *cpu)
t = FIELD_DP32(t, ID_MMFR4, HPDS, 1); /* FEAT_AA32HPD */
t = FIELD_DP32(t, ID_MMFR4, AC2, 1); /* ACTLR2, HACTLR2 */
t = FIELD_DP32(t, ID_MMFR4, CNP, 1); /* FEAT_TTCNP */
- t = FIELD_DP32(t, ID_MMFR4, XNX, 1); /* FEAT_XNX*/
+ t = FIELD_DP32(t, ID_MMFR4, XNX, 1); /* FEAT_XNX */
cpu->isar.id_mmfr4 = t;
t = cpu->isar.id_mmfr5;
--
2.34.1
- [PULL 00/20] target-arm.next patch queue, Richard Henderson, 2022/09/14
- [PULL 01/20] target/arm: Add cortex-a35, Richard Henderson, 2022/09/14
- [PATCH] target/arm: Do alignment check when translation disabled, Richard Henderson, 2022/09/14
- [PULL 02/20] hw/arm/bcm2835_property: Add support for RPI_FIRMWARE_FRAMEBUFFER_GET_NUM_DISPLAYS, Richard Henderson, 2022/09/14
- [PULL 03/20] target/arm: Make cpregs 0, c0, c{3-15}, {0-7} correctly RAZ in v8, Richard Henderson, 2022/09/14
- [PULL 04/20] target/arm: Sort KVM reads of AArch32 ID registers into encoding order, Richard Henderson, 2022/09/14
- [PULL 05/20] target/arm: Implement ID_MMFR5, Richard Henderson, 2022/09/14
- [PULL 06/20] target/arm: Implement ID_DFR1, Richard Henderson, 2022/09/14
- [PULL 08/20] target/arm: Add missing space in comment,
Richard Henderson <=
- [PULL 13/20] target/arm: Honour MDCR_EL2.HPMD in Secure EL2, Richard Henderson, 2022/09/14
- [PULL 12/20] target/arm: Ignore PMCR.D when PMCR.LC is set, Richard Henderson, 2022/09/14
- [PULL 16/20] target/arm: Implement FEAT_PMUv3p5 cycle counter disable bits, Richard Henderson, 2022/09/14
- [PULL 14/20] target/arm: Detect overflow when calculating next PMU interrupt, Richard Henderson, 2022/09/14
- [PULL 15/20] target/arm: Rename pmu_8_n feature test functions, Richard Henderson, 2022/09/14
- [PULL 17/20] target/arm: Support 64-bit event counters for FEAT_PMUv3p5, Richard Henderson, 2022/09/14
- [PULL 07/20] target/arm: Advertise FEAT_ETS for '-cpu max', Richard Henderson, 2022/09/14
- [PULL 20/20] target/arm: Make boards pass base address to armv7m_load_kernel(), Richard Henderson, 2022/09/14
- [PULL 09/20] target/arm: Don't corrupt high half of PMOVSR when cycle counter overflows, Richard Henderson, 2022/09/14
- [PULL 18/20] target/arm: Report FEAT_PMUv3p5 for TCG '-cpu max', Richard Henderson, 2022/09/14