[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH v2 01/11] hw: encode accessing CPU index in MemTxAttrs
From: |
Peter Maydell |
Subject: |
Re: [PATCH v2 01/11] hw: encode accessing CPU index in MemTxAttrs |
Date: |
Mon, 26 Sep 2022 16:30:48 +0100 |
On Mon, 26 Sept 2022 at 16:24, Alex Bennée <alex.bennee@linaro.org> wrote:
>
>
> Peter Maydell <peter.maydell@linaro.org> writes:
> > I still don't see anything in this patchset that updates
> > the code which currently assumes requester_id to be a PCI
> > index to check that it hasn't been handed a MemTxAttrs
> > that uses requester_id as a CPU number.
>
> OK I'll update so all the existing cases setting requester_id also set
> the type to MEMTXATTRS_MSI.
The problem is not the places that set requester_id (you can
arrange for the default to be MSI for back-compat if you don't
want to explicitly set it), but the places that *read* it.
-- PMM
[PATCH v2 03/11] target/arm: ensure HVF traps set appropriate MemTxAttrs, Alex Bennée, 2022/09/26
[PATCH v2 05/11] hw/intc/gic: use MxTxAttrs to divine accessing CPU, Alex Bennée, 2022/09/26