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[RFC PATCH 07/16] hw/arm/smmuv3: Check validity of stage-2 page table
From: |
Mostafa Saleh |
Subject: |
[RFC PATCH 07/16] hw/arm/smmuv3: Check validity of stage-2 page table |
Date: |
Sun, 5 Feb 2023 09:44:02 +0000 |
Check if with the configured start level, ia_bits and granularity we
can have a valid page table as described in ARM ARM D8.2 Translation
process.
The idea is to see for the highest possible number of IPA bits, how
many concatenated tables we would need, if it is more than 16, then
this is not possible.
Signed-off-by: Mostafa Saleh <smostafa@google.com>
---
hw/arm/smmuv3.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index 6633fe40fa..c49b341287 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -341,6 +341,28 @@ static int smmu_get_cd(SMMUv3State *s, STE *ste, uint32_t
ssid,
return 0;
}
+/*
+ * Return true if s2 page table config is valid.
+ * This checks with the configured start level, ia_bits and granularity we can
+ * have a valid page table as described in ARM ARM D8.2 Translation process.
+ * The idea here is to see for the highest possible number of IPA bits, how
+ * many concatenated tables we would need, if it is more than 16, then this is
+ * not possible.
+ */
+static bool s2_pgtable_config_valid(uint8_t sl0, uint8_t t0sz, uint8_t gran)
+{
+ int level = get_start_level(sl0, gran);
+ uint64_t ia_bits = 64 - t0sz;
+ uint64_t mx = (1ULL << ia_bits) - 1;
+ int nr_concat = pgd_idx(level, gran, mx) + 1;
+
+ if (nr_concat > SMMU_MAX_S2_CONCAT) {
+ return false;
+ }
+
+ return true;
+}
+
/* Returns < 0 in case of invalid STE, 0 otherwise */
static int decode_ste(SMMUv3State *s, SMMUTransCfg *cfg,
STE *ste, SMMUEventInfo *event)
@@ -407,6 +429,13 @@ static int decode_ste(SMMUv3State *s, SMMUTransCfg *cfg,
goto bad_ste;
}
+ if (!s2_pgtable_config_valid(cfg->s2cfg.sl0, cfg->s2cfg.tsz,
+ cfg->s2cfg.granule_sz)) {
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "SMMUv3 STE stage 2 config not valid!\n");
+ goto bad_ste;
+ }
+
/* This is still here as stage 2 has not been fully enabled yet. */
qemu_log_mask(LOG_UNIMP, "SMMUv3 does not support stage 2 yet\n");
goto bad_ste;
--
2.39.1.519.gcb327c4b5f-goog
- Re: [RFC PATCH 04/16] hw/arm/smmuv3: Add a system property to choose translation stage, (continued)
[RFC PATCH 05/16] hw/arm/smmuv3: Add page table walk for stage-2, Mostafa Saleh, 2023/02/05
[RFC PATCH 06/16] hw/arm/smmuv3: Parse STE config for stage-2, Mostafa Saleh, 2023/02/05
[RFC PATCH 07/16] hw/arm/smmuv3: Check validity of stage-2 page table,
Mostafa Saleh <=
[RFC PATCH 08/16] hw/arm/smmuv3: Support S2AFFD, Mostafa Saleh, 2023/02/05
[RFC PATCH 09/16] hw/arm/smmuv3: Don't touch CD if stage-1 is not supported., Mostafa Saleh, 2023/02/05
[RFC PATCH 11/16] hw/arm/smmuv3: Read VMID from STE, Mostafa Saleh, 2023/02/05
[RFC PATCH 13/16] hw/arm/smmuv3: Add CMDs related to stage 2, Mostafa Saleh, 2023/02/05