Re: [PATCH v2 00/13] Introduce AST27x0 multi-SoC machine

[Cédric Le Goater]

On 4/8/25 08:35, Steven Lee wrote:
> > -----Original Message-----
> > From: Cédric Le Goater <clg@kaod.org>
> > Sent: Wednesday, March 26, 2025 1:34 AM
> > To: Steven Lee <steven_lee@aspeedtech.com>; Peter Maydell
> > <peter.maydell@linaro.org>; Troy Lee <leetroy@gmail.com>; Jamin Lin
> > <jamin_lin@aspeedtech.com>; Andrew Jeffery
> > <andrew@codeconstruct.com.au>; Joel Stanley <joel@jms.id.au>; open
> > list:ASPEED BMCs <qemu-arm@nongnu.org>; open list:All patches CC here
> > <qemu-devel@nongnu.org>
> > Cc: Troy Lee <troy_lee@aspeedtech.com>; Yunlin Tang
> > <yunlin.tang@aspeedtech.com>
> > Subject: Re: [PATCH v2 00/13] Introduce AST27x0 multi-SoC machine
> >
> > Hello Steven,
> >
> > On 3/13/25 06:40, Steven Lee wrote:
> > > This patch series introduces full core support for the AST27x0 SoC, along with
> > necessary updates to the ASPEED AST27x0 SOC.
> > > The AST27x0 SoC is a new family of ASPEED SoCs featuring 4 Cortex-A35
> > cores and 2 Cortex-M4 cores.
> > > v1:
> > >     - Map unimplemented devices in SoC memory
> > >     - Intruduce AST2700 CM4 SoC
> > >     - Introduce AST27x0FC Machine
> > >
> > > v2:
> > >     - Remove unused functions
> > >     - Correct hex notation for device addresses in AST27x0 SoC
> > >     - Add AST2700 SSP INTC and AST2700 TSP INTC
> > >     - Split AST27x0 CM4 SoC to AST27x0 SSP SoC and AST27x0 TSP SoC
> > >     - Add AST27x0 A0 SSP SoC and AST27x0 A1 SSP SoC
> > >     - Add AST27x0 A0 TSP SoC and AST27x0 A1 TSP SoC
> > >     - Add functional tests for AST2700FC A0 and AST2700FC A1
> > >     - Add Documentation for AST2700FC
> >
> > Please try to label all patches as v2. See 'git format-patch -v ...'
>
> Hi Cédric,
>
> Thanks for the reminder. I will label the patches as v3 in the next submission.
>
> Regards,
> Steven
>
> > > Steven Lee (13):
> > >     aspeed: ast27x0: Map unimplemented devices in SoC memory
> > >     aspeed: ast27x0: Correct hex notation for device addresses
> > >     hw/intc/aspeed: Add support for AST2700 SSP INTC
> > >     hw/intc/aspeed: Add support for AST2700 TSP INTC
> > >     hw/arm/aspeed_ast27x0-ssp: Introduce AST27x0 A0 SSP SoC
> > >     hw/arm/aspeed_ast27x0-ssp: Introduce AST27x0 A1 SSP SoC
> > >     hw/arm/aspeed_ast27x0-tsp: Introduce AST27x0 A0 TSP SoC
> > >     hw/arm/aspeed_ast27x0-tsp: Introduce AST27x0 A1 TSP SoC
> > >     hw/arm: Introduce ASPEED AST2700 a0 full core machine
> > >     hw/arm: Introduce ASPEED AST2700 a1 full core machine
> > >     tests/function/aspeed: Add functional test for AST2700FC
> > >     tests/function/aspeed: Add functional test for AST2700FC A1
> > >     docs: Add support for ast2700fc machine
> >
> > Do we need to add support for the A0 and A1 ? Would A1 be enough ?
>
> I will remove A0 in v3 the patch series.

Thanks, it all looked good to me. I should be able to queue the series
quickly for QEMU 10.1 before Jamin's HACE changes.

C.


> > >    docs/system/arm/aspeed.rst                 |  61 ++-
> > >    include/hw/arm/aspeed_soc.h                |  32 ++
> > >    include/hw/intc/aspeed_intc.h              |   5 +
> > >    hw/arm/aspeed_ast27x0-fc.c                 | 340
> > +++++++++++++++++
> > >    hw/arm/aspeed_ast27x0-ssp.c                | 400
> > +++++++++++++++++++
> > >    hw/arm/aspeed_ast27x0-tsp.c                | 400
> > +++++++++++++++++++
> > >    hw/arm/aspeed_ast27x0.c                    |  79 +++-
> > >    hw/intc/aspeed_intc.c                      | 424
> > +++++++++++++++++++++
> > >    hw/arm/meson.build                         |   6 +-
> > >    tests/functional/test_aarch64_ast2700fc.py | 161 ++++++++
> > >    10 files changed, 1884 insertions(+), 24 deletions(-)
> > >    create mode 100644 hw/arm/aspeed_ast27x0-fc.c
> > >    create mode 100644 hw/arm/aspeed_ast27x0-ssp.c
> > >    create mode 100644 hw/arm/aspeed_ast27x0-tsp.c
> > >    create mode 100755 tests/functional/test_aarch64_ast2700fc.py