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[PATCH v3 0/3] hw/block/m25p80: Numonyx: Fix dummy cycles and check for
From: |
Joe Komlodi |
Subject: |
[PATCH v3 0/3] hw/block/m25p80: Numonyx: Fix dummy cycles and check for SPI mode on cmds |
Date: |
Thu, 5 Nov 2020 17:32:55 -0800 |
Changelog:
v2 -> v3
- 1/3: Added, Fixes NVCFG polarity for DIO/QIO.
- 2/3: Added, Checks if we can execute the current command in standard/DIO/QIO
mode.
- 3/3: Was 1/1 in v2. Added cycle counts for DIO/QIO mode.
v1 -> v2
- 1/2: Change function name to be more accurate
- 2/2: Dropped
Hi all,
The series fixes the behavior of the dummy cycle register for Numonyx flashes so
it's closer to how hardware behaves.
It also checks if a command can be executed in the current SPI mode
(standard, DIO, or QIO) before extracting dummy cycles for the command.
On hardware, the dummy cycles for fast read commands are set to a specific value
(8 or 10) if the register is all 0s or 1s.
If the register value isn't all 0s or 1s, then the flash expects the amount of
cycles sent to be equal to the count in the register.
Thanks!
Joe
Joe Komlodi (3):
hw/block/m25p80: Fix Numonyx NVCFG DIO and QIO bit polarity
hw/block/m25p80: Check SPI mode before running some Numonyx commands
hw/block/m25p80: Fix Numonyx fast read dummy cycle count
hw/block/m25p80.c | 176 +++++++++++++++++++++++++++++++++++++++++++++++++-----
1 file changed, 161 insertions(+), 15 deletions(-)
--
2.7.4
- [PATCH v3 0/3] hw/block/m25p80: Numonyx: Fix dummy cycles and check for SPI mode on cmds,
Joe Komlodi <=