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[PATCH v3 0/2] Re: hw/ide/piix: Ignore writes of hardwired PCI command r


From: Lev Kujawski
Subject: [PATCH v3 0/2] Re: hw/ide/piix: Ignore writes of hardwired PCI command register bits
Date: Sun, 25 Sep 2022 09:37:57 +0000

> On Tue, Sep 06, 2022 at 10:23:57AM -0400, Michael S. Tsirkin wrote:
> > On Thu, Jun 02, 2022 at 08:47:31PM +0000, Lev Kujawski wrote:
> > > ---
> > > This revised patch uses QEMU's built-in PCI bit-masking support rather
> > > than attempting to manually filter writes.  Thanks to Philippe Mathieu-
> > > Daude and Michael S. Tsirkin for review and the pointer.
> >
> > But pls note I wrote:
> >
> >     Might need machine compat machinery
> >     for this.
> >
> > without said machinery, if guest set one of the other
> > bits, migration will fail.
>
> I assume v3 will be forthcoming, right?

Thanks for your review and my apologies for the delay.  I hope this revised
patch appropriately handles the machine state migration case.

Kind regards,
Lev Kujawski

Lev Kujawski (2):
  qpci_device_enable: Allow for command bits hardwired to 0
  hw/ide/piix: Ignore writes of hardwired PCI command register bits

 hw/ide/pci.c             |  5 +++++
 hw/ide/piix.c            | 39 +++++++++++++++++++++++++++++++++++++++
 include/hw/ide/pci.h     |  7 ++++++-
 tests/qtest/ide-test.c   |  1 +
 tests/qtest/libqos/pci.c | 13 +++++++------
 tests/qtest/libqos/pci.h |  1 +
 6 files changed, 59 insertions(+), 7 deletions(-)

-- 
2.34.1




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