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[Qemu-commits] [qemu/qemu] fbd3c4: linux-user/arm: Mark the commpage exe


From: Paolo Bonzini
Subject: [Qemu-commits] [qemu/qemu] fbd3c4: linux-user/arm: Mark the commpage executable
Date: Tue, 06 Sep 2022 04:32:23 -0700

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: fbd3c4cff641cae082edb765017cbb699efa6712
      
https://github.com/qemu/qemu/commit/fbd3c4cff641cae082edb765017cbb699efa6712
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-09-06 (Tue, 06 Sep 2022)

  Changed paths:
    M linux-user/arm/target_cpu.h
    M linux-user/elfload.c

  Log Message:
  -----------
  linux-user/arm: Mark the commpage executable

We're about to start validating PAGE_EXEC, which means
that we've got to mark the commpage executable.  We had
been placing the commpage outside of reserved_va, which
was incorrect and lead to an abort.

Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Tested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: eee816c0b972bd085e62fcd7d2de7a34dbbd155b
      
https://github.com/qemu/qemu/commit/eee816c0b972bd085e62fcd7d2de7a34dbbd155b
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-09-06 (Tue, 06 Sep 2022)

  Changed paths:
    M linux-user/elfload.c

  Log Message:
  -----------
  linux-user/hppa: Allocate page zero as a commpage

We're about to start validating PAGE_EXEC, which means that we've
got to mark page zero executable.  We had been special casing this
entirely within translate.

Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Tested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: d461b73ec007ccbe861db91bbcd792c92e46fcad
      
https://github.com/qemu/qemu/commit/d461b73ec007ccbe861db91bbcd792c92e46fcad
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-09-06 (Tue, 06 Sep 2022)

  Changed paths:
    M linux-user/elfload.c

  Log Message:
  -----------
  linux-user/x86_64: Allocate vsyscall page as a commpage

We're about to start validating PAGE_EXEC, which means that we've
got to mark the vsyscall page executable.  We had been special
casing this entirely within translate.

Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Tested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 872f3d046f2381e3f416519e82df96bd60818311
      
https://github.com/qemu/qemu/commit/872f3d046f2381e3f416519e82df96bd60818311
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-09-06 (Tue, 06 Sep 2022)

  Changed paths:
    M include/elf.h
    M linux-user/elfload.c
    M linux-user/qemu.h

  Log Message:
  -----------
  linux-user: Honor PT_GNU_STACK

Map the stack executable if required by default or on demand.

Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Tested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: aa98e2d885ca9de66ddd56d88b19b0e162cc90d7
      
https://github.com/qemu/qemu/commit/aa98e2d885ca9de66ddd56d88b19b0e162cc90d7
  Author: Ilya Leoshkevich <iii@linux.ibm.com>
  Date:   2022-09-06 (Tue, 06 Sep 2022)

  Changed paths:
    M linux-user/mmap.c

  Log Message:
  -----------
  linux-user: Clear translations on mprotect()

Currently it's possible to execute pages that do not have PAGE_EXEC
if there is an existing translation block. Fix by invalidating TBs
that touch the affected pages.

Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Message-Id: <20220817150506.592862-2-iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: d64655c2c35d967e9c496937885c511240204e76
      
https://github.com/qemu/qemu/commit/d64655c2c35d967e9c496937885c511240204e76
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-09-06 (Tue, 06 Sep 2022)

  Changed paths:
    M tests/tcg/i386/test-i386.c

  Log Message:
  -----------
  tests/tcg/i386: Move smc_code2 to an executable section

We're about to start validating PAGE_EXEC, which means
that we've got to put this code into a section that is
both writable and executable.

Note that this test did not run on hardware beforehand either.

Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Tested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: f3b2b81b6fdaacfa8a769ad5834e6f6f129e2119
      
https://github.com/qemu/qemu/commit/f3b2b81b6fdaacfa8a769ad5834e6f6f129e2119
  Author: Ilya Leoshkevich <iii@linux.ibm.com>
  Date:   2022-09-06 (Tue, 06 Sep 2022)

  Changed paths:
    M include/exec/translator.h

  Log Message:
  -----------
  accel/tcg: Introduce is_same_page()

Introduce a function that checks whether a given address is on the same
page as where disassembly started. Having it improves readability of
the following patches.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Message-Id: <20220811095534.241224-3-iii@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
[rth: Make the DisasContextBase parameter const.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: cdf7130851318004e6512dbfdb73156fe59c7a59
      
https://github.com/qemu/qemu/commit/cdf7130851318004e6512dbfdb73156fe59c7a59
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-09-06 (Tue, 06 Sep 2022)

  Changed paths:
    M accel/tcg/cputlb.c
    M accel/tcg/user-exec.c
    M include/exec/exec-all.h

  Log Message:
  -----------
  accel/tcg: Properly implement get_page_addr_code for user-only

The current implementation is a no-op, simply returning addr.
This is incorrect, because we ought to be checking the page
permissions for execution.

Make get_page_addr_code inline for both implementations.

Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Tested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 297368c74d077b24f0bb5c4f1ce541cc23d36815
      
https://github.com/qemu/qemu/commit/297368c74d077b24f0bb5c4f1ce541cc23d36815
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-09-06 (Tue, 06 Sep 2022)

  Changed paths:
    M accel/tcg/cpu-exec.c
    M accel/tcg/user-exec.c

  Log Message:
  -----------
  accel/tcg: Unlock mmap_lock after longjmp

The mmap_lock is held around tb_gen_code.  While the comment
is correct that the lock is dropped when tb_gen_code runs out
of memory, the lock is *not* dropped when an exception is
raised reading code for translation.

Acked-by: Alistair Francis <alistair.francis@wdc.com>
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Tested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 0c90ba16e3b51381dc82b0f54532c6609261aea0
      
https://github.com/qemu/qemu/commit/0c90ba16e3b51381dc82b0f54532c6609261aea0
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-09-06 (Tue, 06 Sep 2022)

  Changed paths:
    M accel/tcg/cpu-exec.c
    M include/exec/exec-all.h

  Log Message:
  -----------
  accel/tcg: Make tb_htable_lookup static

The function is not used outside of cpu-exec.c.  Move it and
its subroutines up in the file, before the first use.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Tested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 97e03465f7dac073434373428388eb6e0998ecea
      
https://github.com/qemu/qemu/commit/97e03465f7dac073434373428388eb6e0998ecea
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-09-06 (Tue, 06 Sep 2022)

  Changed paths:
    M accel/tcg/cputlb.c
    M include/exec/cpu-common.h
    M softmmu/physmem.c

  Log Message:
  -----------
  accel/tcg: Move qemu_ram_addr_from_host_nofail to physmem.c

The base qemu_ram_addr_from_host function is already in
softmmu/physmem.c; move the nofail version to be adjacent.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Tested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 7e0d9973ea665bf459b2dbd173d0e51bc6ca5216
      
https://github.com/qemu/qemu/commit/7e0d9973ea665bf459b2dbd173d0e51bc6ca5216
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-09-06 (Tue, 06 Sep 2022)

  Changed paths:
    M accel/tcg/cputlb.c

  Log Message:
  -----------
  accel/tcg: Use probe_access_internal for softmmu get_page_addr_code_hostp

Simplify the implementation of get_page_addr_code_hostp
by reusing the existing probe_access infrastructure.

Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Tested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 9867b30287ec98728e52ed49d03c666e86c90a04
      
https://github.com/qemu/qemu/commit/9867b30287ec98728e52ed49d03c666e86c90a04
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-09-06 (Tue, 06 Sep 2022)

  Changed paths:
    M accel/tcg/cpu-exec.c

  Log Message:
  -----------
  accel/tcg: Document the faulting lookup in tb_lookup_cmp

It was non-obvious to me why we can raise an exception in
the middle of a comparison function, but it works.
While nearby, use TARGET_PAGE_ALIGN instead of open-coding.

Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: dac8d19bdb3ccaafbcbd2df34135464964232a8f
      
https://github.com/qemu/qemu/commit/dac8d19bdb3ccaafbcbd2df34135464964232a8f
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-09-06 (Tue, 06 Sep 2022)

  Changed paths:
    M include/exec/translator.h
    M target/i386/tcg/translate.c

  Log Message:
  -----------
  accel/tcg: Remove translator_ldsw

The only user can easily use translator_lduw and
adjust the type to signed during the return.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Tested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 306c872103b4d0986c9f671eb7538b0b70bf69b5
      
https://github.com/qemu/qemu/commit/306c872103b4d0986c9f671eb7538b0b70bf69b5
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-09-06 (Tue, 06 Sep 2022)

  Changed paths:
    M accel/tcg/translate-all.c
    M accel/tcg/translator.c
    M include/exec/exec-all.h
    M include/exec/translator.h
    M target/alpha/translate.c
    M target/arm/translate.c
    M target/avr/translate.c
    M target/cris/translate.c
    M target/hexagon/translate.c
    M target/hppa/translate.c
    M target/i386/tcg/translate.c
    M target/loongarch/translate.c
    M target/m68k/translate.c
    M target/microblaze/translate.c
    M target/mips/tcg/translate.c
    M target/nios2/translate.c
    M target/openrisc/translate.c
    M target/ppc/translate.c
    M target/riscv/translate.c
    M target/rx/translate.c
    M target/s390x/tcg/translate.c
    M target/sh4/translate.c
    M target/sparc/translate.c
    M target/tricore/translate.c
    M target/xtensa/translate.c

  Log Message:
  -----------
  accel/tcg: Add pc and host_pc params to gen_intermediate_code

Pass these along to translator_loop -- pc may be used instead
of tb->pc, and host_pc is currently unused.  Adjust all targets
at one time.

Acked-by: Alistair Francis <alistair.francis@wdc.com>
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Tested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 50627f1b7b1b1db60166a670fbc17623c7d7243e
      
https://github.com/qemu/qemu/commit/50627f1b7b1b1db60166a670fbc17623c7d7243e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-09-06 (Tue, 06 Sep 2022)

  Changed paths:
    M accel/tcg/translate-all.c
    M accel/tcg/translator.c
    M include/exec/translator.h

  Log Message:
  -----------
  accel/tcg: Add fast path for translator_ld*

Cache the translation from guest to host address, so we may
use direct loads when we hit on the primary translation page.

Look up the second translation page only once, during translation.
This obviates another lookup of the second page within tb_gen_code
after translation.

Fixes a bug in that plugin_insn_append should be passed the bytes
in the original memory order, not bswapped by pieces.

Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Tested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: ab12c95d3f1999648d70bca54ebcc0588a07dd3e
      
https://github.com/qemu/qemu/commit/ab12c95d3f1999648d70bca54ebcc0588a07dd3e
  Author: Ilya Leoshkevich <iii@linux.ibm.com>
  Date:   2022-09-06 (Tue, 06 Sep 2022)

  Changed paths:
    M target/s390x/tcg/translate.c
    A tests/tcg/multiarch/noexec.c.inc
    M tests/tcg/s390x/Makefile.target
    A tests/tcg/s390x/noexec.c

  Log Message:
  -----------
  target/s390x: Make translator stop before the end of a page

Right now translator stops right *after* the end of a page, which
breaks reporting of fault locations when the last instruction of a
multi-insn translation block crosses a page boundary.

Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220817150506.592862-3-iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 950936681f322a5ba2813f83eb44dd972be2d5a3
      
https://github.com/qemu/qemu/commit/950936681f322a5ba2813f83eb44dd972be2d5a3
  Author: Ilya Leoshkevich <iii@linux.ibm.com>
  Date:   2022-09-06 (Tue, 06 Sep 2022)

  Changed paths:
    M target/i386/tcg/translate.c
    M tests/tcg/x86_64/Makefile.target
    A tests/tcg/x86_64/noexec.c

  Log Message:
  -----------
  target/i386: Make translator stop before the end of a page

Right now translator stops right *after* the end of a page, which
breaks reporting of fault locations when the last instruction of a
multi-insn translation block crosses a page boundary.

An implementation, like the one arm and s390x have, would require an
i386 length disassembler, which is burdensome to maintain. Another
alternative would be to single-step at the end of a guest page, but
this may come with a performance impact.

Fix by snapshotting disassembly state and restoring it after we figure
out we crossed a page boundary. This includes rolling back cc_op
updates and emitted ops.

Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1143
Message-Id: <20220817150506.592862-4-iii@linux.ibm.com>
[rth: Simplify end-of-insn cross-page checks.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: ef6e987b64343e0dc9e8526c80ee8d27d0654549
      
https://github.com/qemu/qemu/commit/ef6e987b64343e0dc9e8526c80ee8d27d0654549
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-09-06 (Tue, 06 Sep 2022)

  Changed paths:
    M target/riscv/translate.c

  Log Message:
  -----------
  target/riscv: Add MAX_INSN_LEN and insn_len

These will be useful in properly ending the TB.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Tested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 00c07344fa245b22e895b363320ba4cd0ec1088a
      
https://github.com/qemu/qemu/commit/00c07344fa245b22e895b363320ba4cd0ec1088a
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-09-06 (Tue, 06 Sep 2022)

  Changed paths:
    M target/riscv/translate.c
    M tests/tcg/riscv64/Makefile.target
    A tests/tcg/riscv64/noexec.c

  Log Message:
  -----------
  target/riscv: Make translator stop before the end of a page

Right now the translator stops right *after* the end of a page, which
breaks reporting of fault locations when the last instruction of a
multi-insn translation block crosses a page boundary.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1155
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Tested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: b34b42f1b6a33c455dccce6ceb49962dddbb7a8a
      
https://github.com/qemu/qemu/commit/b34b42f1b6a33c455dccce6ceb49962dddbb7a8a
  Author: Stefan Hajnoczi <stefanha@redhat.com>
  Date:   2022-09-06 (Tue, 06 Sep 2022)

  Changed paths:
    M accel/tcg/cpu-exec.c
    M accel/tcg/cputlb.c
    M accel/tcg/translate-all.c
    M accel/tcg/translator.c
    M accel/tcg/user-exec.c
    M include/elf.h
    M include/exec/cpu-common.h
    M include/exec/exec-all.h
    M include/exec/translator.h
    M linux-user/arm/target_cpu.h
    M linux-user/elfload.c
    M linux-user/mmap.c
    M linux-user/qemu.h
    M softmmu/physmem.c
    M target/alpha/translate.c
    M target/arm/translate.c
    M target/avr/translate.c
    M target/cris/translate.c
    M target/hexagon/translate.c
    M target/hppa/translate.c
    M target/i386/tcg/translate.c
    M target/loongarch/translate.c
    M target/m68k/translate.c
    M target/microblaze/translate.c
    M target/mips/tcg/translate.c
    M target/nios2/translate.c
    M target/openrisc/translate.c
    M target/ppc/translate.c
    M target/riscv/translate.c
    M target/rx/translate.c
    M target/s390x/tcg/translate.c
    M target/sh4/translate.c
    M target/sparc/translate.c
    M target/tricore/translate.c
    M target/xtensa/translate.c
    M tests/tcg/i386/test-i386.c
    A tests/tcg/multiarch/noexec.c.inc
    M tests/tcg/riscv64/Makefile.target
    A tests/tcg/riscv64/noexec.c
    M tests/tcg/s390x/Makefile.target
    A tests/tcg/s390x/noexec.c
    M tests/tcg/x86_64/Makefile.target
    A tests/tcg/x86_64/noexec.c

  Log Message:
  -----------
  Merge tag 'pull-tcg-20220906' of https://gitlab.com/rth7680/qemu into staging

Respect PROT_EXEC in user-only mode.
Fix s390x, i386 and riscv for translations crossing a page.

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* tag 'pull-tcg-20220906' of https://gitlab.com/rth7680/qemu:
  target/riscv: Make translator stop before the end of a page
  target/riscv: Add MAX_INSN_LEN and insn_len
  target/i386: Make translator stop before the end of a page
  target/s390x: Make translator stop before the end of a page
  accel/tcg: Add fast path for translator_ld*
  accel/tcg: Add pc and host_pc params to gen_intermediate_code
  accel/tcg: Remove translator_ldsw
  accel/tcg: Document the faulting lookup in tb_lookup_cmp
  accel/tcg: Use probe_access_internal for softmmu get_page_addr_code_hostp
  accel/tcg: Move qemu_ram_addr_from_host_nofail to physmem.c
  accel/tcg: Make tb_htable_lookup static
  accel/tcg: Unlock mmap_lock after longjmp
  accel/tcg: Properly implement get_page_addr_code for user-only
  accel/tcg: Introduce is_same_page()
  tests/tcg/i386: Move smc_code2 to an executable section
  linux-user: Clear translations on mprotect()
  linux-user: Honor PT_GNU_STACK
  linux-user/x86_64: Allocate vsyscall page as a commpage
  linux-user/hppa: Allocate page zero as a commpage
  linux-user/arm: Mark the commpage executable

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>


Compare: https://github.com/qemu/qemu/compare/fd28528ece59...b34b42f1b6a3



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