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[Qemu-commits] [qemu/qemu] be8550: hw/arm/aspeed: Add VPD data for Raini
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From: |
Richard Henderson |
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Subject: |
[Qemu-commits] [qemu/qemu] be8550: hw/arm/aspeed: Add VPD data for Rainier machine |
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Date: |
Fri, 16 Jun 2023 03:29:28 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: be85508f174def8f13cac3855368a27592a6ea1b
https://github.com/qemu/qemu/commit/be85508f174def8f13cac3855368a27592a6ea1b
Author: Ninad Palsule <ninad@linux.ibm.com>
Date: 2023-06-15 (Thu, 15 Jun 2023)
Changed paths:
M hw/arm/aspeed.c
M hw/arm/aspeed_eeprom.c
M hw/arm/aspeed_eeprom.h
Log Message:
-----------
hw/arm/aspeed: Add VPD data for Rainier machine
The current modeling of Rainier machine creates zero filled VPDs(EEPROMs).
This makes some services and applications unhappy and causing them to fail.
Hence this drop adds some fabricated data for system and BMC FRU so that
vpd services are happy and active.
Tested:
- The system-vpd.service is active.
- VPD service related to bmc is active.
Signed-off-by: Ninad Palsule <ninad@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
[ clg: commit title cleanup ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: c8f48b120b31f6bbe33135ef5d478e485c37e3c2
https://github.com/qemu/qemu/commit/c8f48b120b31f6bbe33135ef5d478e485c37e3c2
Author: Cédric Le Goater <clg@kaod.org>
Date: 2023-06-15 (Thu, 15 Jun 2023)
Changed paths:
M hw/misc/aspeed_hace.c
Log Message:
-----------
aspeed/hace: Initialize g_autofree pointer
As mentioned in docs/devel/style.rst "Automatic memory deallocation":
* Variables declared with g_auto* MUST always be initialized,
otherwise the cleanup function will use uninitialized stack memory
This avoids QEMU to coredump when running the "hash test" command
under Zephyr.
Cc: Steven Lee <steven_lee@aspeedtech.com>
Cc: Joel Stanley <joel@jms.id.au>
Cc: qemu-stable@nongnu.org
Fixes: c5475b3f9a ("hw: Model ASPEED's Hash and Crypto Engine")
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
Message-Id: <20230421131547.2177449-1-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: 262259eab15d04900b78b91e307bb8470438a011
https://github.com/qemu/qemu/commit/262259eab15d04900b78b91e307bb8470438a011
Author: Cédric Le Goater <clg@kaod.org>
Date: 2023-06-15 (Thu, 15 Jun 2023)
Changed paths:
M hw/arm/aspeed.c
Log Message:
-----------
aspeed: Introduce a boot_rom region at the machine level
This should also avoid Coverity to report a memory leak warning when
the QEMU process exits. See CID 1508061.
Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: ebd643ebd2540cd54a6742eaf2e3e4864cf6dd48
https://github.com/qemu/qemu/commit/ebd643ebd2540cd54a6742eaf2e3e4864cf6dd48
Author: Cédric Le Goater <clg@kaod.org>
Date: 2023-06-15 (Thu, 15 Jun 2023)
Changed paths:
M hw/arm/fby35.c
Log Message:
-----------
aspeed: Use the boot_rom region of the fby35 machine
This change completes commits 5aa281d757 ("aspeed: Introduce a
spi_boot region under the SoC") and 8b744a6a47 ("aspeed: Add a
boot_rom overlap region in the SoC spi_boot container") which
introduced a spi_boot container at the SoC level to map the boot rom
region as an overlap.
It also fixes a Coverity report (CID 1508061) for a memory leak
warning when the QEMU process exits by using an bmc_boot_rom
MemoryRegion available at the machine level.
Cc: Peter Delevoryas <peter@pjd.dev>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: f65f6ad5a749bc2d24a083da3544f47a19e7e81f
https://github.com/qemu/qemu/commit/f65f6ad5a749bc2d24a083da3544f47a19e7e81f
Author: Cédric Le Goater <clg@kaod.org>
Date: 2023-06-15 (Thu, 15 Jun 2023)
Changed paths:
M docs/system/arm/aspeed.rst
M hw/arm/aspeed.c
Log Message:
-----------
aspeed: Introduce a "bmc-console" machine option
Most of the Aspeed machines use the UART5 device for the boot console,
and QEMU connects the first serial Chardev to this SoC device for this
purpose. See routine connect_serial_hds_to_uarts().
Nevertheless, some machines use another boot console, such as the fuji,
and commit 5d63d0c76c ("hw/arm/aspeed: Allow machine to set UART
default") introduced a SoC class attribute 'uart_default' and property
to be able to change the boot console device. It was later changed by
commit d2b3eaefb4 ("aspeed: Refactor UART init for multi-SoC machines").
The "bmc-console" machine option goes a step further and lets the user define
the UART device from the QEMU command line without introducing a new
machine definition. For instance, to use device UART3 (mapped on
/dev/ttyS2 under Linux) instead of the default UART5, one would use :
-M ast2500-evb,bmc-console=uart3
Cc: Abhishek Singh Dagur <abhishek@drut.io>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: 42bea956f6f7477c06186c7add62fa0107a27a9c
https://github.com/qemu/qemu/commit/42bea956f6f7477c06186c7add62fa0107a27a9c
Author: Cédric Le Goater <clg@kaod.org>
Date: 2023-06-15 (Thu, 15 Jun 2023)
Changed paths:
M hw/arm/aspeed_ast2600.c
M target/arm/cpu.c
M target/arm/cpu.h
Log Message:
-----------
target/arm: Allow users to set the number of VFP registers
Cortex A7 CPUs with an FPU implementing VFPv4 without NEON support
have 16 64-bit FPU registers and not 32 registers. Let users set the
number of VFP registers with a CPU property.
The primary use case of this property is for the Cortex A7 of the
Aspeed AST2600 SoC.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: 5692a39f329413a00020a61fff95aff6b9884a73
https://github.com/qemu/qemu/commit/5692a39f329413a00020a61fff95aff6b9884a73
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-06-16 (Fri, 16 Jun 2023)
Changed paths:
M docs/system/arm/aspeed.rst
M hw/arm/aspeed.c
M hw/arm/aspeed_ast2600.c
M hw/arm/aspeed_eeprom.c
M hw/arm/aspeed_eeprom.h
M hw/arm/fby35.c
M hw/misc/aspeed_hace.c
M target/arm/cpu.c
M target/arm/cpu.h
Log Message:
-----------
Merge tag 'pull-aspeed-20230615' of https://github.com/legoater/qemu into
staging
aspeed queue:
* extension of the rainier machine with VPD contents
* fixes for Coverity issues
* new "bmc-console" machine option
* new "vfp-d32" ARM CPU property
# -----BEGIN PGP SIGNATURE-----
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# b6/Yh1vCwuzVRut5wqMNefmX1ez36rdy3KDvg99Pu3Ln4QqBXhE=
# =qTHL
# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 15 Jun 2023 06:54:15 PM CEST
# gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1
* tag 'pull-aspeed-20230615' of https://github.com/legoater/qemu:
target/arm: Allow users to set the number of VFP registers
aspeed: Introduce a "bmc-console" machine option
aspeed: Use the boot_rom region of the fby35 machine
aspeed: Introduce a boot_rom region at the machine level
aspeed/hace: Initialize g_autofree pointer
hw/arm/aspeed: Add VPD data for Rainier machine
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Compare: https://github.com/qemu/qemu/compare/7efd65423ab2...5692a39f3294