[Qemu-devel] [PATCH 0/4] TCG: add some instructions

[Andre Przywara]

Hi,

this patch series adds some instructions to the x86 TCG emulator.
They are all AMD originated, although RDTSCP is also implemented in
recent Intel CPUs. They are:
Patch 1: lzcnt (count leading zero bits in a word)
Patch 2: lock mov cr0 = mov cr8 (access to TPR in 32-bit mode)
Patch 3: extrq, insertq, movntss, movntsd (SSE4a instructions)
Patch 4: rdtscp (read TSC plus aux MSR)
         This adds a new field to CPUX86State and thus bumps the
         SAVE_VERSION for the CPU.
I am not very experienced in TCG, but I have written tests to check
the functionality of the implementation. Those tests use inline
assembly to trigger the opcodes and check their results with "golden"
precalculated values. The tests showed the same results in linux-user
and on the native hardware.

Please review!

Regards,
Andre.