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[Qemu-devel] [PATCH 04/14] ARM: fix ldrexd/strexd
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 04/14] ARM: fix ldrexd/strexd |
Date: |
Tue, 7 Dec 2010 15:43:33 +0000 |
Correct ldrexd and strexd code to always read and write the
high word of the 64-bit value from addr+4.
Also make ldrexd and strexd agree that for a 64 bit value the
address in env->exclusive_addr is that of the low word.
This fixes the issues reported in
https://bugs.launchpad.net/qemu/+bug/670883
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Nathan Froyd <address@hidden>
---
linux-user/main.c | 2 +-
target-arm/translate.c | 8 +++++---
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/linux-user/main.c b/linux-user/main.c
index 7d41d4a..0d627d6 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -589,7 +589,7 @@ static int do_strex(CPUARMState *env)
}
if (size == 3) {
val = env->regs[(env->exclusive_info >> 12) & 0xf];
- segv = put_user_u32(val, addr);
+ segv = put_user_u32(val, addr + 4);
if (segv) {
env->cp15.c6_data = addr + 4;
goto done;
diff --git a/target-arm/translate.c b/target-arm/translate.c
index bf1e643..7ee5375 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -5926,8 +5926,10 @@ static void gen_load_exclusive(DisasContext *s, int rt,
int rt2,
tcg_gen_mov_i32(cpu_exclusive_val, tmp);
store_reg(s, rt, tmp);
if (size == 3) {
- tcg_gen_addi_i32(addr, addr, 4);
- tmp = gen_ld32(addr, IS_USER(s));
+ TCGv tmp2 = new_tmp();
+ tcg_gen_addi_i32(tmp2, addr, 4);
+ tmp = gen_ld32(tmp2, IS_USER(s));
+ dead_tmp(tmp2);
tcg_gen_mov_i32(cpu_exclusive_high, tmp);
store_reg(s, rt2, tmp);
}
@@ -5987,7 +5989,7 @@ static void gen_store_exclusive(DisasContext *s, int rd,
int rt, int rt2,
if (size == 3) {
TCGv tmp2 = new_tmp();
tcg_gen_addi_i32(tmp2, addr, 4);
- tmp = gen_ld32(addr, IS_USER(s));
+ tmp = gen_ld32(tmp2, IS_USER(s));
dead_tmp(tmp2);
tcg_gen_brcond_i32(TCG_COND_NE, tmp, cpu_exclusive_high, fail_label);
dead_tmp(tmp);
--
1.6.3.3
- [Qemu-devel] [PATCH 00/14] [PULL] ARM fixes, v2, Peter Maydell, 2010/12/07
- [Qemu-devel] [PATCH 04/14] ARM: fix ldrexd/strexd,
Peter Maydell <=
- [Qemu-devel] [PATCH 11/14] ARM: Return correct result for single<->double conversion of NaN, Peter Maydell, 2010/12/07
- [Qemu-devel] [PATCH 14/14] ARM: Implement VCVT to 16 bit integer using new softfloat routines, Peter Maydell, 2010/12/07
- [Qemu-devel] [PATCH 05/14] ARM: Fix decoding of VFP forms of VCVT between float and int/fixed, Peter Maydell, 2010/12/07
- [Qemu-devel] [PATCH 13/14] softfloat: Add float/double to 16 bit integer conversion functions, Peter Maydell, 2010/12/07
- [Qemu-devel] [PATCH 10/14] softfloat: Add float*_maybe_silence_nan() functions, Peter Maydell, 2010/12/07
- [Qemu-devel] [PATCH 03/14] target-arm: Handle 'smc' as an undefined instruction, Peter Maydell, 2010/12/07
- [Qemu-devel] [PATCH 02/14] target-arm: Fix mixup in decoding of saturating add and sub, Peter Maydell, 2010/12/07
- [Qemu-devel] [PATCH 12/14] ARM: Ignore top 16 bits when doing VCVT from 16 bit fixed point, Peter Maydell, 2010/12/07
- [Qemu-devel] [PATCH 08/14] softfloat: Add float*_is_any_nan() functions, Peter Maydell, 2010/12/07
- [Qemu-devel] [PATCH 01/14] target-arm: Add support for PKHxx in thumb2, Peter Maydell, 2010/12/07