[Qemu-devel] [PATCH v4 0/7] RTC: New logic to emulate RTC

[Zhang, Yang Z]

Changes in v4:
Rebase to latest head.
Changing in patch 6: 
        Set the timer to one second earlier before target alarm when AF bit is 
clear. In version 3, in order to solve the async between UF, AF and UIP, the 
timer will keep running when UF or AF are clear. This is a little ugly, 
especially when a userspace program is using the alarm and we cannot achieve 
any power saving. In this version, when the AF bit is cleared, we will set the 
timer to one second earlier before the alarm. With this changing, we can avoid 
the unnecessary timer and keep the sync between UF, AF and UIP. Please help to 
review the patch 6.

Changes in v3:
Rebase to latest head.
Remove the logic to update time format when DM bit changed.
Allow to migrate from old version.
Solve the async when reading UF and UIP

Changes in v2:
Add UIP check logic.
Add logic that next second tick will occur in exactly 500ms later after reset 
divider

Current RTC emulation uses periodic timer(2 timers per second) to update RTC 
clock. And it will stop CPU staying at deep C-state for long period. Our 
experience shows the Pkg C6 residency reduced 6% when running 64 idle guest.
The following patch stop the two periodic timer and only updating RTC clock 
when guest try to read it.
--- 
Yang Zhang (7):
        RTC: Remove the logic to update time format when DM bit changed
        RTC: Update the RTC clock only when reading it
        RTC: Add UIP(update in progress) check logic
        RTC: Set internal millisecond register to 500ms when reset divider
        RTC: Add RTC update-ended interrupt support
        RTC: Add alarm support
        RTC: Allow to migrate from old version

    hw/mc146818rtc.c |  617 
++++++++++++++++++++++++++++++++++++++++-------------
    1 files changed, 465 insertions(+), 152 deletions(-)

best regards
yang