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Re: [Qemu-devel] [PATCH v5 12/15] petalogix-ml605: added SPI controller
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v5 12/15] petalogix-ml605: added SPI controller with n25q128 |
Date: |
Mon, 6 Aug 2012 10:50:40 +0100 |
On 6 August 2012 03:16, Peter A. G. Crosthwaite
<address@hidden> wrote:
> Added SPI controller to the reference design, with two n25q128 spi-flashes
> connected.
>
> Signed-off-by: Peter A. G. Crosthwaite <address@hidden>
> ---
> hw/petalogix_ml605_mmu.c | 28 +++++++++++++++++++++++++++-
> 1 files changed, 27 insertions(+), 1 deletions(-)
>
> diff --git a/hw/petalogix_ml605_mmu.c b/hw/petalogix_ml605_mmu.c
> index 6a7d0c0..f0ecc1f 100644
> --- a/hw/petalogix_ml605_mmu.c
> +++ b/hw/petalogix_ml605_mmu.c
> @@ -36,6 +36,7 @@
> #include "blockdev.h"
> #include "pc.h"
> #include "exec-memory.h"
> +#include "ssi.h"
>
> #include "microblaze_boot.h"
> #include "microblaze_pic_cpu.h"
> @@ -54,6 +55,8 @@
> #define AXIENET_BASEADDR 0x82780000
> #define AXIDMA_BASEADDR 0x84600000
>
> +#define NUM_SPI_FLASHES 2
> +
> static void machine_cpu_reset(MicroBlazeCPU *cpu)
> {
> CPUMBState *env = &cpu->env;
> @@ -78,6 +81,7 @@ petalogix_ml605_init(ram_addr_t ram_size,
> MemoryRegion *address_space_mem = get_system_memory();
> DeviceState *dev;
> MicroBlazeCPU *cpu;
> + SysBusDevice *busdev;
> CPUMBState *env;
> DriveInfo *dinfo;
> int i;
> @@ -135,9 +139,31 @@ petalogix_ml605_init(ram_addr_t ram_size,
> irq[1], irq[0], 100 * 1000000);
> }
>
> + {
> + SSIBus *spi;
> +
> + dev = qdev_create(NULL, "xilinx,spi");
> + qdev_prop_set_uint8(dev, "num-cs", NUM_SPI_FLASHES);
> + qdev_init_nofail(dev);
> + busdev = sysbus_from_qdev(dev);
> + sysbus_mmio_map(busdev, 0, 0x40a00000);
> + sysbus_connect_irq(busdev, 0, irq[4]);
> +
> + spi = (SSIBus *)qdev_get_child_bus(dev, "spi");
> +
> + for (i = 0; i < NUM_SPI_FLASHES; i++) {
> + qemu_irq cs_line;
> +
> + dev = ssi_create_slave_no_init(spi, "m25p80");
> + qdev_prop_set_string(dev, "partname", (char *)"n25q128");
Why the cast?
> + qdev_init_nofail(dev);
> + cs_line = qdev_get_gpio_in(dev, 0);
> + sysbus_connect_irq(busdev, i+1, cs_line);
> + }
> + }
> +
> microblaze_load_kernel(cpu, ddr_base, ram_size, BINARY_DEVICE_TREE_FILE,
>
> machine_cpu_reset);
> -
> }
>
> static QEMUMachine petalogix_ml605_machine = {
> --
> 1.7.0.4
>
-- PMM
- Re: [Qemu-devel] [PATCH v5 09/15] hw: Added generic FIFO API., (continued)
- [Qemu-devel] [PATCH v5 11/15] xilinx_spi: Initial impl. of Xilinx SPI controller, Peter A. G. Crosthwaite, 2012/08/05
- [Qemu-devel] [PATCH v5 13/15] xilinx_spips: Xilinx Zynq SPI cntrlr device model, Peter A. G. Crosthwaite, 2012/08/05
- [Qemu-devel] [PATCH v5 14/15] xilinx_zynq: Added SPI controllers + flashes, Peter A. G. Crosthwaite, 2012/08/05
- [Qemu-devel] [PATCH v5 15/15] MAINTAINERS: Added maintainerships for SSI, Peter A. G. Crosthwaite, 2012/08/05
- [Qemu-devel] [PATCH v5 10/15] m25p80: Initial implementation of SPI flash device, Peter A. G. Crosthwaite, 2012/08/05
- [Qemu-devel] [PATCH v5 07/15] stellaris: Removed SSI mux, Peter A. G. Crosthwaite, 2012/08/05
- [Qemu-devel] [PATCH v5 12/15] petalogix-ml605: added SPI controller with n25q128, Peter A. G. Crosthwaite, 2012/08/05
- Re: [Qemu-devel] [PATCH v5 12/15] petalogix-ml605: added SPI controller with n25q128,
Peter Maydell <=