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Re: [Qemu-devel] [PATCH] [MIPS] Fix order of CVT.PS.S operands
From: |
Stefan Hajnoczi |
Subject: |
Re: [Qemu-devel] [PATCH] [MIPS] Fix order of CVT.PS.S operands |
Date: |
Mon, 27 Aug 2012 10:07:05 +0100 |
On Mon, Aug 27, 2012 at 9:53 AM, Richard Sandiford
<address@hidden> wrote:
> The FS input to CVT.PS.S is the high half and FT is the low half.
> tcg_gen_concat_i32_i64 takes the low half first, so the operands
> were in the wrong order.
>
> Signed-off-by: Richard Sandiford <address@hidden>
> ---
> target-mips/translate.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/target-mips/translate.c b/target-mips/translate.c
> index 06f0ac6..defc021 100644
> --- a/target-mips/translate.c
> +++ b/target-mips/translate.c
> @@ -6907,7 +6907,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode
> op1,
>
> gen_load_fpr32(fp32_0, fs);
> gen_load_fpr32(fp32_1, ft);
> - tcg_gen_concat_i32_i64(fp64, fp32_0, fp32_1);
> + tcg_gen_concat_i32_i64(fp64, fp32_1, fp32_0);
> tcg_temp_free_i32(fp32_1);
> tcg_temp_free_i32(fp32_0);
> gen_store_fpr64(ctx, fp64, fd);
> --
> 1.7.7.6
CCing Aurelian for MIPS. You can look at ./MAINTAINERS to see who
should be CCed.
Stefan