[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH] PPC: e500: Fix TLB lookup for 32bit CPUs
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PATCH] PPC: e500: Fix TLB lookup for 32bit CPUs |
Date: |
Wed, 4 Jun 2014 00:29:44 +0200 |
When we run 32bit guest CPUs (or 32bit guest code on 64bit CPUs) on
qemu-system-ppc64 the TLB lookup will use the full effective address
as pointer.
However, only the first 32bits are valid when MSR.CM = 0. Check for
that condition.
This makes QEMU boot an e500v2 guest with more than 1G of RAM for me.
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/mmu_helper.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
index 298e570..12e954c 100644
--- a/target-ppc/mmu_helper.c
+++ b/target-ppc/mmu_helper.c
@@ -902,6 +902,11 @@ static int ppcmas_tlb_check(CPUPPCState *env, ppcmas_tlb_t
*tlb,
target_ulong mask;
uint32_t tlb_pid;
+ if (!msr_cm) {
+ /* In 32bit mode we can only address 32bit EAs */
+ address = (uint32_t)address;
+ }
+
/* Check valid flag */
if (!(tlb->mas1 & MAS1_VALID)) {
return -1;
--
1.8.1.4
[Prev in Thread] |
Current Thread |
[Next in Thread] |
- [Qemu-devel] [PATCH] PPC: e500: Fix TLB lookup for 32bit CPUs,
Alexander Graf <=