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[Qemu-devel] [PULL 30/33] target-i386: raise page fault for reserved bit
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PULL 30/33] target-i386: raise page fault for reserved bits in large pages |
Date: |
Thu, 5 Jun 2014 16:22:20 +0200 |
In large pages, bit 12 is for PAT, but bits starting at 13 are reserved.
Signed-off-by: Paolo Bonzini <address@hidden>
---
target-i386/cpu.h | 2 ++
target-i386/helper.c | 1 +
2 files changed, 3 insertions(+)
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 8ceea8b..51959be 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -249,6 +249,7 @@
#define PG_DIRTY_BIT 6
#define PG_PSE_BIT 7
#define PG_GLOBAL_BIT 8
+#define PG_PSE_PAT_BIT 12
#define PG_NX_BIT 63
#define PG_PRESENT_MASK (1 << PG_PRESENT_BIT)
@@ -260,6 +261,7 @@
#define PG_DIRTY_MASK (1 << PG_DIRTY_BIT)
#define PG_PSE_MASK (1 << PG_PSE_BIT)
#define PG_GLOBAL_MASK (1 << PG_GLOBAL_BIT)
+#define PG_PSE_PAT_MASK (1 << PG_PSE_PAT_BIT)
#define PG_ADDRESS_MASK 0x000ffffffffff000LL
#define PG_HI_RSVD_MASK (PG_ADDRESS_MASK & ~PHYS_ADDR_MASK)
#define PG_HI_USER_MASK 0x7ff0000000000000LL
diff --git a/target-i386/helper.c b/target-i386/helper.c
index a2e8bd1..94081e8 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -695,6 +695,7 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr,
}
do_check_protect:
+ rsvd_mask |= (page_size - 1) & PG_ADDRESS_MASK & ~PG_PSE_PAT_MASK;
if (pte & rsvd_mask) {
goto do_fault_rsvd;
}
--
1.8.3.1
- [Qemu-devel] [PULL 21/33] target-i386: commonize checks for PAE and non-PAE, (continued)
- [Qemu-devel] [PULL 21/33] target-i386: commonize checks for PAE and non-PAE, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 23/33] target-i386: introduce do_check_protect label, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 22/33] target-i386: tweak handling of PG_NX_MASK, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 24/33] target-i386: introduce support for 1 GB pages, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 26/33] target-i386: test reserved PS bit on PML4Es, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 25/33] target-i386: set correct error code for reserved bit access, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 27/33] target-i386: raise page fault for reserved physical address bits, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 28/33] target-i386: simplify pte/vaddr calculation, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 29/33] target-i386: unify reserved bits and NX bit check, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 31/33] target-i386: support long addresses for 4MB pages (PSE-36), Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 30/33] target-i386: raise page fault for reserved bits in large pages,
Paolo Bonzini <=
- [Qemu-devel] [PULL 32/33] target-i386: fix protection bits in the TLB for SMEP, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 33/33] target-i386: cleanup x86_cpu_get_phys_page_debug, Paolo Bonzini, 2014/06/05
- Re: [Qemu-devel] [PULL 00/33] softmmu cleanups and target-i386 paging fixes, Peter Maydell, 2014/06/05