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[Qemu-devel] [PATCH v5 04/12] target-mips: get_physical_address: Add def
From: |
James Hogan |
Subject: |
[Qemu-devel] [PATCH v5 04/12] target-mips: get_physical_address: Add defines for segment bases |
Date: |
Tue, 17 Jun 2014 23:10:29 +0100 |
Add preprocessor definitions for 32bit segment bases for use in
get_physical_address(). These will also be taken advantage of in the
next patch which adds KVM awareness.
Signed-off-by: James Hogan <address@hidden>
Reviewed-by: Aurelien Jarno <address@hidden>
---
target-mips/helper.c | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/target-mips/helper.c b/target-mips/helper.c
index 064622cc31ba..caacd762fd90 100644
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
@@ -118,7 +118,13 @@ static int get_physical_address (CPUMIPSState *env, hwaddr
*physical,
qemu_log("user mode %d h %08x\n", user_mode, env->hflags);
#endif
- if (address <= (int32_t)0x7FFFFFFFUL) {
+#define USEG_LIMIT 0x7FFFFFFFUL
+#define KSEG0_BASE 0x80000000UL
+#define KSEG1_BASE 0xA0000000UL
+#define KSEG2_BASE 0xC0000000UL
+#define KSEG3_BASE 0xE0000000UL
+
+ if (address <= USEG_LIMIT) {
/* useg */
if (env->CP0_Status & (1 << CP0St_ERL)) {
*physical = address & 0xFFFFFFFF;
@@ -160,23 +166,23 @@ static int get_physical_address (CPUMIPSState *env,
hwaddr *physical,
ret = TLBRET_BADADDR;
}
#endif
- } else if (address < (int32_t)0xA0000000UL) {
+ } else if (address < (int32_t)KSEG1_BASE) {
/* kseg0 */
if (kernel_mode) {
- *physical = address - (int32_t)0x80000000UL;
+ *physical = address - (int32_t)KSEG0_BASE;
*prot = PAGE_READ | PAGE_WRITE;
} else {
ret = TLBRET_BADADDR;
}
- } else if (address < (int32_t)0xC0000000UL) {
+ } else if (address < (int32_t)KSEG2_BASE) {
/* kseg1 */
if (kernel_mode) {
- *physical = address - (int32_t)0xA0000000UL;
+ *physical = address - (int32_t)KSEG1_BASE;
*prot = PAGE_READ | PAGE_WRITE;
} else {
ret = TLBRET_BADADDR;
}
- } else if (address < (int32_t)0xE0000000UL) {
+ } else if (address < (int32_t)KSEG3_BASE) {
/* sseg (kseg2) */
if (supervisor_mode || kernel_mode) {
ret = env->tlb->map_address(env, physical, prot, address, rw,
access_type);
--
1.9.3
- [Qemu-devel] [PATCH v5 03/12] hw/mips: Add API to convert KVM guest KSEG0 <-> GPA, (continued)
- [Qemu-devel] [PATCH v5 03/12] hw/mips: Add API to convert KVM guest KSEG0 <-> GPA, James Hogan, 2014/06/17
- [Qemu-devel] [PATCH v5 11/12] target-mips: Enable KVM support in build system, James Hogan, 2014/06/17
- [Qemu-devel] [PATCH v5 05/12] target-mips: get_physical_address: Add KVM awareness, James Hogan, 2014/06/17
- [Qemu-devel] [PATCH v5 06/12] kvm: Allow arch to set sigmask length, James Hogan, 2014/06/17
- [Qemu-devel] [PATCH v5 01/12] target-mips: Reset CPU timer consistently, James Hogan, 2014/06/17
- [Qemu-devel] [PATCH v5 10/12] hw/mips: malta: Add KVM support, James Hogan, 2014/06/17
- [Qemu-devel] [PATCH v5 09/12] hw/mips: In KVM mode, inject IRQ2 (I/O) interrupts via ioctls, James Hogan, 2014/06/17
- [Qemu-devel] [PATCH v5 02/12] hw/mips/cputimer: Don't start periodic timer in KVM mode, James Hogan, 2014/06/17
- [Qemu-devel] [PATCH v5 08/12] target-mips: Call kvm_mips_reset_vcpu() from mips_cpu_reset(), James Hogan, 2014/06/17
- [Qemu-devel] [PATCH v5 04/12] target-mips: get_physical_address: Add defines for segment bases,
James Hogan <=
- Re: [Qemu-devel] [PATCH v5 00/12] KVM Support for MIPS32 Processors, Paolo Bonzini, 2014/06/18