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[Qemu-devel] [PATCH v2 5/7] target-arm: Remove old code and replace with
From: |
Alistair Francis |
Subject: |
[Qemu-devel] [PATCH v2 5/7] target-arm: Remove old code and replace with new functions |
Date: |
Thu, 26 Jun 2014 15:02:34 +1000 |
Remove the old PMCCNTR code and replace it with calls to the new
pmccntr_sync() function and the CCNT_ENABLED macro
Signed-off-by: Alistair Francis <address@hidden>
---
target-arm/helper.c | 27 ++++-----------------------
1 files changed, 4 insertions(+), 23 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 016fe47..0bd00cb 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -609,20 +609,7 @@ void pmccntr_sync(CPUARMState *env)
static void pmcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
uint64_t value)
{
- uint64_t temp_ticks;
-
- temp_ticks = muldiv64(qemu_clock_get_us(QEMU_CLOCK_VIRTUAL),
- get_ticks_per_sec(), 1000000);
-
- if (env->cp15.c9_pmcr & PMCRE) {
- /* If the counter is enabled */
- if (env->cp15.c9_pmcr & PMCRD) {
- /* Increment once every 64 processor clock cycles */
- env->cp15.c15_ccnt = (temp_ticks/64) - env->cp15.c15_ccnt;
- } else {
- env->cp15.c15_ccnt = temp_ticks - env->cp15.c15_ccnt;
- }
- }
+ pmccntr_sync(env);
if (value & PMCRC) {
/* The counter has been reset */
@@ -633,20 +620,14 @@ static void pmcr_write(CPUARMState *env, const
ARMCPRegInfo *ri,
env->cp15.c9_pmcr &= ~0x39;
env->cp15.c9_pmcr |= (value & 0x39);
- if (env->cp15.c9_pmcr & PMCRE) {
- if (env->cp15.c9_pmcr & PMCRD) {
- /* Increment once every 64 processor clock cycles */
- temp_ticks /= 64;
- }
- env->cp15.c15_ccnt = temp_ticks - env->cp15.c15_ccnt;
- }
+ pmccntr_sync(env);
}
static uint64_t pmccntr_read(CPUARMState *env, const ARMCPRegInfo *ri)
{
uint64_t total_ticks;
- if (!(env->cp15.c9_pmcr & PMCRE)) {
+ if (!arm_ccnt_enabled(env)) {
/* Counter is disabled, do not change value */
return env->cp15.c15_ccnt;
}
@@ -666,7 +647,7 @@ static void pmccntr_write(CPUARMState *env, const
ARMCPRegInfo *ri,
{
uint64_t total_ticks;
- if (!(env->cp15.c9_pmcr & PMCRE)) {
+ if (!arm_ccnt_enabled(env)) {
/* Counter is disabled, set the absolute value */
env->cp15.c15_ccnt = value;
return;
--
1.7.1
- [Qemu-devel] [PATCH v2 0/7] target-arm: Extend PMCCNTR for ARMv8, Alistair Francis, 2014/06/26
- [Qemu-devel] [PATCH v2 1/7] target-arm: Make the ARM PMCCNTR register 64-bit, Alistair Francis, 2014/06/26
- [Qemu-devel] [PATCH v2 2/7] target-arm: Implement PMCCNTR_EL0 and related registers, Alistair Francis, 2014/06/26
- [Qemu-devel] [PATCH v2 3/7] target-arm: Add arm_ccnt_enabled function, Alistair Francis, 2014/06/26
- [Qemu-devel] [PATCH v2 4/7] target-arm: Implement pmccntr_sync function, Alistair Francis, 2014/06/26
- [Qemu-devel] [PATCH v2 5/7] target-arm: Remove old code and replace with new functions,
Alistair Francis <=
- [Qemu-devel] [PATCH v2 6/7] target-arm: Implement pmccfiltr_write function, Alistair Francis, 2014/06/26
- [Qemu-devel] [PATCH v2 7/7] target-arm: Call the pmccntr_sync function when swapping ELs, Alistair Francis, 2014/06/26