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[Qemu-devel] [PULL 14/22] target-arm: Add the GICv2m to the virt board
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 14/22] target-arm: Add the GICv2m to the virt board |
Date: |
Tue, 2 Jun 2015 17:33:44 +0100 |
From: Christoffer Dall <address@hidden>
Add a GICv2m device to the virt board to enable MSIs on the generic PCI
host controller. We allocate 64 SPIs in the IRQ space for now (this can
be increased/decreased later) and map the GICv2m right after the GIC in
the memory map.
Reviewed-by: Eric Auger <address@hidden>
Signed-off-by: Christoffer Dall <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/virt.c | 40 +++++++++++++++++++++++++++++++++++++++-
include/hw/arm/virt.h | 2 ++
2 files changed, 41 insertions(+), 1 deletion(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 387dac8..4bb7175 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -70,6 +70,7 @@ typedef struct VirtBoardInfo {
int fdt_size;
uint32_t clock_phandle;
uint32_t gic_phandle;
+ uint32_t v2m_phandle;
} VirtBoardInfo;
typedef struct {
@@ -109,6 +110,7 @@ static const MemMapEntry a15memmap[] = {
/* GIC distributor and CPU interfaces sit inside the CPU peripheral space
*/
[VIRT_GIC_DIST] = { 0x08000000, 0x00010000 },
[VIRT_GIC_CPU] = { 0x08010000, 0x00010000 },
+ [VIRT_GIC_V2M] = { 0x08020000, 0x00001000 },
[VIRT_UART] = { 0x09000000, 0x00001000 },
[VIRT_RTC] = { 0x09010000, 0x00001000 },
[VIRT_FW_CFG] = { 0x09020000, 0x0000000a },
@@ -125,6 +127,7 @@ static const int a15irqmap[] = {
[VIRT_RTC] = 2,
[VIRT_PCIE] = 3, /* ... to 6 */
[VIRT_MMIO] = 16, /* ...to 16 + NUM_VIRTIO_TRANSPORTS - 1 */
+ [VIRT_GIC_V2M] = 48, /* ...to 48 + NUM_GICV2M_SPIS - 1 */
};
static VirtBoardInfo machines[] = {
@@ -300,9 +303,21 @@ static void fdt_add_cpu_nodes(const VirtBoardInfo *vbi)
}
}
-static void fdt_add_gic_node(VirtBoardInfo *vbi)
+static void fdt_add_v2m_gic_node(VirtBoardInfo *vbi)
{
+ vbi->v2m_phandle = qemu_fdt_alloc_phandle(vbi->fdt);
+ qemu_fdt_add_subnode(vbi->fdt, "/intc/v2m");
+ qemu_fdt_setprop_string(vbi->fdt, "/intc/v2m", "compatible",
+ "arm,gic-v2m-frame");
+ qemu_fdt_setprop(vbi->fdt, "/intc/v2m", "msi-controller", NULL, 0);
+ qemu_fdt_setprop_sized_cells(vbi->fdt, "/intc/v2m", "reg",
+ 2, vbi->memmap[VIRT_GIC_V2M].base,
+ 2, vbi->memmap[VIRT_GIC_V2M].size);
+ qemu_fdt_setprop_cell(vbi->fdt, "/intc/v2m", "phandle", vbi->v2m_phandle);
+}
+static void fdt_add_gic_node(VirtBoardInfo *vbi)
+{
vbi->gic_phandle = qemu_fdt_alloc_phandle(vbi->fdt);
qemu_fdt_setprop_cell(vbi->fdt, "/", "interrupt-parent", vbi->gic_phandle);
@@ -323,6 +338,25 @@ static void fdt_add_gic_node(VirtBoardInfo *vbi)
qemu_fdt_setprop_cell(vbi->fdt, "/intc", "phandle", vbi->gic_phandle);
}
+static void create_v2m(VirtBoardInfo *vbi, qemu_irq *pic)
+{
+ int i;
+ int irq = vbi->irqmap[VIRT_GIC_V2M];
+ DeviceState *dev;
+
+ dev = qdev_create(NULL, "arm-gicv2m");
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vbi->memmap[VIRT_GIC_V2M].base);
+ qdev_prop_set_uint32(dev, "base-spi", irq);
+ qdev_prop_set_uint32(dev, "num-spi", NUM_GICV2M_SPIS);
+ qdev_init_nofail(dev);
+
+ for (i = 0; i < NUM_GICV2M_SPIS; i++) {
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, pic[irq + i]);
+ }
+
+ fdt_add_v2m_gic_node(vbi);
+}
+
static void create_gic(VirtBoardInfo *vbi, qemu_irq *pic)
{
/* We create a standalone GIC v2 */
@@ -373,6 +407,8 @@ static void create_gic(VirtBoardInfo *vbi, qemu_irq *pic)
}
fdt_add_gic_node(vbi);
+
+ create_v2m(vbi, pic);
}
static void create_uart(const VirtBoardInfo *vbi, qemu_irq *pic)
@@ -676,6 +712,8 @@ static void create_pcie(const VirtBoardInfo *vbi, qemu_irq
*pic)
qemu_fdt_setprop_cells(vbi->fdt, nodename, "bus-range", 0,
nr_pcie_buses - 1);
+ qemu_fdt_setprop_cells(vbi->fdt, nodename, "msi-parent", vbi->v2m_phandle);
+
qemu_fdt_setprop_sized_cells(vbi->fdt, nodename, "reg",
2, base_ecam, 2, size_ecam);
qemu_fdt_setprop_sized_cells(vbi->fdt, nodename, "ranges",
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index ceec8b3..003ef29 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -32,6 +32,7 @@
#include "qemu-common.h"
+#define NUM_GICV2M_SPIS 64
#define NUM_VIRTIO_TRANSPORTS 32
#define ARCH_TIMER_VIRT_IRQ 11
@@ -53,6 +54,7 @@ enum {
VIRT_PCIE_MMIO,
VIRT_PCIE_PIO,
VIRT_PCIE_ECAM,
+ VIRT_GIC_V2M,
};
typedef struct MemMapEntry {
--
1.9.1
- Re: [Qemu-devel] [PULL 20/22] hw/arm/boot: arm_load_kernel implemented as a machine init done notifier, (continued)
[Qemu-devel] [PULL 21/22] hw/arm/virt: add dynamic sysbus device support, Peter Maydell, 2015/06/02
[Qemu-devel] [PULL 17/22] arm_gicv2m: set kvm_gsi_direct_mapping and kvm_msi_via_irqfd_allowed, Peter Maydell, 2015/06/02
[Qemu-devel] [PULL 16/22] kvm: introduce kvm_arch_msi_data_to_gsi, Peter Maydell, 2015/06/02
[Qemu-devel] [PULL 19/22] hw/arm/sysbus-fdt: helpers for platform bus nodes addition, Peter Maydell, 2015/06/02
[Qemu-devel] [PULL 15/22] pl061: fix wrong calculation of GPIOMIS register, Peter Maydell, 2015/06/02
[Qemu-devel] [PULL 13/22] target-arm: Extend the gic node properties, Peter Maydell, 2015/06/02
[Qemu-devel] [PULL 14/22] target-arm: Add the GICv2m to the virt board,
Peter Maydell <=
[Qemu-devel] [PULL 09/22] target-arm: Add TLBI_VAE2{IS}, Peter Maydell, 2015/06/02
[Qemu-devel] [PULL 11/22] target-arm: Add GIC phandle to VirtBoardInfo, Peter Maydell, 2015/06/02
[Qemu-devel] [PULL 08/22] target-arm: Add TLBI_ALLE2, Peter Maydell, 2015/06/02
[Qemu-devel] [PULL 06/22] target-arm: Add TTBR0_EL2, Peter Maydell, 2015/06/02
[Qemu-devel] [PULL 05/22] target-arm: Add TPIDR_EL2, Peter Maydell, 2015/06/02
[Qemu-devel] [PULL 12/22] arm_gicv2m: Add GICv2m widget to support MSIs, Peter Maydell, 2015/06/02
[Qemu-devel] [PULL 04/22] target-arm: Add SCTLR_EL2, Peter Maydell, 2015/06/02
[Qemu-devel] [PULL 02/22] target-arm: Add MAIR_EL2, Peter Maydell, 2015/06/02
[Qemu-devel] [PULL 10/22] Revert "target-arm: Avoid g_hash_table_get_keys()", Peter Maydell, 2015/06/02
[Qemu-devel] [PULL 03/22] target-arm: Add TCR_EL2, Peter Maydell, 2015/06/02