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[Qemu-devel] [PULL 17/28] hw/pci: introduce PCI Expander Bridge (PXB)
From: |
Michael S. Tsirkin |
Subject: |
[Qemu-devel] [PULL 17/28] hw/pci: introduce PCI Expander Bridge (PXB) |
Date: |
Thu, 4 Jun 2015 13:11:04 +0200 |
From: Marcel Apfelbaum <address@hidden>
PXB is a "light-weight" host bridge whose purpose is to enable
the main host bridge to support multiple PCI root buses
for pc machines.
As oposed to PCI-2-PCI bridge's secondary bus, PXB's bus
is a primary bus and can be associated with a NUMA node
(different from the main host bridge) allowing the guest OS
to recognize the proximity of a pass-through device to
other resources as RAM and CPUs.
The PXB is composed from:
- A primary PCI bus (can be associated with a NUMA node)
Acts like a normal pci bus and from the functionality point
of view is an "expansion" of the bus behind the
main host bridge.
- A pci-2-pci bridge behind the primary PCI bus where the actual
devices will be attached.
- A host-bridge PCI device
Situated on the bus behind the main host bridge, allows
the BIOS to configure the bus number and IO/mem resources.
It does not have its own config/data register for configuration
cycles, this being handled by the main host bridge.
- A host-bridge sysbus to comply with QEMU current design.
Signed-off-by: Marcel Apfelbaum <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Acked-by: Laszlo Ersek <address@hidden>
---
include/hw/pci/pci.h | 1 +
hw/pci-bridge/pci_expander_bridge.c | 196 ++++++++++++++++++++++++++++++++++++
hw/pci-bridge/Makefile.objs | 1 +
3 files changed, 198 insertions(+)
create mode 100644 hw/pci-bridge/pci_expander_bridge.c
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index df05c96..7940700 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -91,6 +91,7 @@
#define PCI_DEVICE_ID_REDHAT_ROCKER 0x0006
#define PCI_DEVICE_ID_REDHAT_SDHCI 0x0007
#define PCI_DEVICE_ID_REDHAT_PCIE_HOST 0x0008
+#define PCI_DEVICE_ID_REDHAT_PXB 0x0009
#define PCI_DEVICE_ID_REDHAT_QXL 0x0100
#define FMT_PCIBUS PRIx64
diff --git a/hw/pci-bridge/pci_expander_bridge.c
b/hw/pci-bridge/pci_expander_bridge.c
new file mode 100644
index 0000000..88e85c1
--- /dev/null
+++ b/hw/pci-bridge/pci_expander_bridge.c
@@ -0,0 +1,196 @@
+/*
+ * PCI Expander Bridge Device Emulation
+ *
+ * Copyright (C) 2015 Red Hat Inc
+ *
+ * Authors:
+ * Marcel Apfelbaum <address@hidden>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#include "hw/pci/pci.h"
+#include "hw/pci/pci_bus.h"
+#include "hw/pci/pci_host.h"
+#include "hw/pci/pci_bus.h"
+#include "hw/i386/pc.h"
+#include "qemu/range.h"
+#include "qemu/error-report.h"
+
+#define TYPE_PXB_BUS "pxb-bus"
+#define PXB_BUS(obj) OBJECT_CHECK(PXBBus, (obj), TYPE_PXB_BUS)
+
+typedef struct PXBBus {
+ /*< private >*/
+ PCIBus parent_obj;
+ /*< public >*/
+
+ char bus_path[8];
+} PXBBus;
+
+#define TYPE_PXB_DEVICE "pxb"
+#define PXB_DEV(obj) OBJECT_CHECK(PXBDev, (obj), TYPE_PXB_DEVICE)
+
+typedef struct PXBDev {
+ /*< private >*/
+ PCIDevice parent_obj;
+ /*< public >*/
+
+ uint8_t bus_nr;
+} PXBDev;
+
+#define TYPE_PXB_HOST "pxb-host"
+
+static int pxb_bus_num(PCIBus *bus)
+{
+ PXBDev *pxb = PXB_DEV(bus->parent_dev);
+
+ return pxb->bus_nr;
+}
+
+static bool pxb_is_root(PCIBus *bus)
+{
+ return true; /* by definition */
+}
+
+static void pxb_bus_class_init(ObjectClass *class, void *data)
+{
+ PCIBusClass *pbc = PCI_BUS_CLASS(class);
+
+ pbc->bus_num = pxb_bus_num;
+ pbc->is_root = pxb_is_root;
+}
+
+static const TypeInfo pxb_bus_info = {
+ .name = TYPE_PXB_BUS,
+ .parent = TYPE_PCI_BUS,
+ .instance_size = sizeof(PXBBus),
+ .class_init = pxb_bus_class_init,
+};
+
+static const char *pxb_host_root_bus_path(PCIHostState *host_bridge,
+ PCIBus *rootbus)
+{
+ PXBBus *bus = PXB_BUS(rootbus);
+
+ snprintf(bus->bus_path, 8, "0000:%02x", pxb_bus_num(rootbus));
+ return bus->bus_path;
+}
+
+static void pxb_host_class_init(ObjectClass *class, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(class);
+ PCIHostBridgeClass *hc = PCI_HOST_BRIDGE_CLASS(class);
+
+ dc->fw_name = "pci";
+ hc->root_bus_path = pxb_host_root_bus_path;
+}
+
+static const TypeInfo pxb_host_info = {
+ .name = TYPE_PXB_HOST,
+ .parent = TYPE_PCI_HOST_BRIDGE,
+ .class_init = pxb_host_class_init,
+};
+
+/*
+ * Registers the PXB bus as a child of the i440fx root bus.
+ *
+ * Returns 0 on successs, -1 if i440fx host was not
+ * found or the bus number is already in use.
+ */
+static int pxb_register_bus(PCIDevice *dev, PCIBus *pxb_bus)
+{
+ PCIBus *bus = dev->bus;
+ int pxb_bus_num = pci_bus_num(pxb_bus);
+
+ if (bus->parent_dev) {
+ error_report("PXB devices can be attached only to root bus.");
+ return -1;
+ }
+
+ QLIST_FOREACH(bus, &bus->child, sibling) {
+ if (pci_bus_num(bus) == pxb_bus_num) {
+ error_report("Bus %d is already in use.", pxb_bus_num);
+ return -1;
+ }
+ }
+ QLIST_INSERT_HEAD(&dev->bus->child, pxb_bus, sibling);
+
+ return 0;
+}
+
+static int pxb_dev_initfn(PCIDevice *dev)
+{
+ PXBDev *pxb = PXB_DEV(dev);
+ DeviceState *ds, *bds;
+ PCIBus *bus;
+ const char *dev_name = NULL;
+
+ if (dev->qdev.id && *dev->qdev.id) {
+ dev_name = dev->qdev.id;
+ }
+
+ ds = qdev_create(NULL, TYPE_PXB_HOST);
+ bus = pci_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS);
+
+ bus->parent_dev = dev;
+ bus->address_space_mem = dev->bus->address_space_mem;
+ bus->address_space_io = dev->bus->address_space_io;
+ bus->map_irq = pci_swizzle_map_irq_fn;
+
+ bds = qdev_create(BUS(bus), "pci-bridge");
+ bds->id = dev_name;
+ qdev_prop_set_uint8(bds, "chassis_nr", pxb->bus_nr);
+
+ PCI_HOST_BRIDGE(ds)->bus = bus;
+
+ if (pxb_register_bus(dev, bus)) {
+ return -EINVAL;
+ }
+
+ qdev_init_nofail(ds);
+ qdev_init_nofail(bds);
+
+ pci_word_test_and_set_mask(dev->config + PCI_STATUS,
+ PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK);
+ pci_config_set_class(dev->config, PCI_CLASS_BRIDGE_HOST);
+
+ return 0;
+}
+
+static Property pxb_dev_properties[] = {
+ /* Note: 0 is not a legal a PXB bus number. */
+ DEFINE_PROP_UINT8("bus_nr", PXBDev, bus_nr, 0),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void pxb_dev_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = pxb_dev_initfn;
+ k->vendor_id = PCI_VENDOR_ID_REDHAT;
+ k->device_id = PCI_DEVICE_ID_REDHAT_PXB;
+ k->class_id = PCI_CLASS_BRIDGE_HOST;
+
+ dc->desc = "PCI Expander Bridge";
+ dc->props = pxb_dev_properties;
+}
+
+static const TypeInfo pxb_dev_info = {
+ .name = TYPE_PXB_DEVICE,
+ .parent = TYPE_PCI_DEVICE,
+ .instance_size = sizeof(PXBDev),
+ .class_init = pxb_dev_class_init,
+};
+
+static void pxb_register_types(void)
+{
+ type_register_static(&pxb_bus_info);
+ type_register_static(&pxb_host_info);
+ type_register_static(&pxb_dev_info);
+}
+
+type_init(pxb_register_types)
diff --git a/hw/pci-bridge/Makefile.objs b/hw/pci-bridge/Makefile.objs
index 96c596e..f2adfe3 100644
--- a/hw/pci-bridge/Makefile.objs
+++ b/hw/pci-bridge/Makefile.objs
@@ -1,4 +1,5 @@
common-obj-y += pci_bridge_dev.o
+common-obj-y += pci_expander_bridge.o
common-obj-$(CONFIG_XIO3130) += xio3130_upstream.o xio3130_downstream.o
common-obj-$(CONFIG_IOH3420) += ioh3420.o
common-obj-$(CONFIG_I82801B11) += i82801b11.o
--
MST
- [Qemu-devel] [PULL 07/28] acpi: add implementation of aml_while() term, (continued)
- [Qemu-devel] [PULL 07/28] acpi: add implementation of aml_while() term, Michael S. Tsirkin, 2015/06/04
- [Qemu-devel] [PULL 08/28] hw/pci: made pci_bus_is_root a PCIBusClass method, Michael S. Tsirkin, 2015/06/04
- [Qemu-devel] [PULL 09/28] hw/pci: made pci_bus_num a PCIBusClass method, Michael S. Tsirkin, 2015/06/04
- [Qemu-devel] [PULL 10/28] hw/i386: query only for q35/pc when looking for pci host bridge, Michael S. Tsirkin, 2015/06/04
- [Qemu-devel] [PULL 11/28] hw/pci: extend PCI config access to support devices behind PXB, Michael S. Tsirkin, 2015/06/04
- [Qemu-devel] [PULL 12/28] hw/acpi: add support for i440fx 'snooping' root busses, Michael S. Tsirkin, 2015/06/04
- [Qemu-devel] [PULL 13/28] hw/apci: add _PRT method for extra PCI root busses, Michael S. Tsirkin, 2015/06/04
- [Qemu-devel] [PULL 14/28] hw/acpi: add _CRS method for extra root busses, Michael S. Tsirkin, 2015/06/04
- [Qemu-devel] [PULL 15/28] hw/acpi: remove from root bus 0 the crs resources used by other buses., Michael S. Tsirkin, 2015/06/04
- [Qemu-devel] [PULL 16/28] hw/pci: removed 'rootbus nr is 0' assumption from qmp_pci_query, Michael S. Tsirkin, 2015/06/04
- [Qemu-devel] [PULL 17/28] hw/pci: introduce PCI Expander Bridge (PXB),
Michael S. Tsirkin <=
- [Qemu-devel] [PULL 18/28] hw/pci: inform bios if the system has extra pci root buses, Michael S. Tsirkin, 2015/06/04
- [Qemu-devel] [PULL 19/28] hw/pxb: add map_irq func, Michael S. Tsirkin, 2015/06/04
- [Qemu-devel] [PULL 20/28] hw/pci: add support for NUMA nodes, Michael S. Tsirkin, 2015/06/04
- [Qemu-devel] [PULL 21/28] hw/pxb: add numa_node parameter, Michael S. Tsirkin, 2015/06/04
- [Qemu-devel] [PULL 22/28] apci: fix PXB behaviour if used with unsupported BIOS, Michael S. Tsirkin, 2015/06/04
- [Qemu-devel] [PULL 24/28] pc-dimm: don't assert if pc-dimm alignment != hotpluggable mem range size, Michael S. Tsirkin, 2015/06/04
- [Qemu-devel] [PULL 23/28] docs: Add PXB documentation, Michael S. Tsirkin, 2015/06/04
- [Qemu-devel] [PULL 25/28] hw/acpi: acpi_pm1_cnt_init(): take "disable_s3" and "disable_s4", Michael S. Tsirkin, 2015/06/04
- [Qemu-devel] [PULL 26/28] hw/acpi: move "etc/system-states" fw_cfg file from PIIX4 to core, Michael S. Tsirkin, 2015/06/04
- [Qemu-devel] [PULL 27/28] hw/acpi: piix4_pm_init(): take fw_cfg object no more, Michael S. Tsirkin, 2015/06/04