[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 20/34] target-s390x: change CHRL and CGHRL format to
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PULL 20/34] target-s390x: change CHRL and CGHRL format to RIL-b |
Date: |
Fri, 5 Jun 2015 01:41:50 +0200 |
From: Aurelien Jarno <address@hidden>
Change to match the PoP. In practice both format RIL-a and RIL-b have
the same fields. They differ on the way we decode the fields, and it's
done correctly in QEMU.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-s390x/insn-data.def | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def
index 3955443..75672a0 100644
--- a/target-s390x/insn-data.def
+++ b/target-s390x/insn-data.def
@@ -159,8 +159,8 @@
C(0xe55c, CHSI, SIL, GIE, m1_32s, i2, 0, 0, 0, cmps64)
C(0xe558, CGHSI, SIL, GIE, m1_64, i2, 0, 0, 0, cmps64)
/* COMPARE HALFWORD RELATIVE LONG */
- C(0xc605, CHRL, RIL_a, GIE, r1_o, mri2_32s, 0, 0, 0, cmps32)
- C(0xc604, CGHRL, RIL_a, GIE, r1_o, mri2_64, 0, 0, 0, cmps64)
+ C(0xc605, CHRL, RIL_b, GIE, r1_o, mri2_32s, 0, 0, 0, cmps32)
+ C(0xc604, CGHRL, RIL_b, GIE, r1_o, mri2_64, 0, 0, 0, cmps64)
/* COMPARE LOGICAL */
C(0x1500, CLR, RR_a, Z, r1, r2, 0, 0, 0, cmpu32)
--
1.7.12.4
- [Qemu-devel] [PULL 00/34] s390 patch queue 2015-06-05, Alexander Graf, 2015/06/04
- [Qemu-devel] [PULL 08/34] target-s390x: implement STCKC helper, Alexander Graf, 2015/06/04
- [Qemu-devel] [PULL 06/34] target-s390x: simplify SCKC helper, Alexander Graf, 2015/06/04
- [Qemu-devel] [PULL 07/34] target-s390x: streamline STCK helper, Alexander Graf, 2015/06/04
- [Qemu-devel] [PULL 04/34] target-s390x: remove unused helpers, Alexander Graf, 2015/06/04
- [Qemu-devel] [PULL 05/34] target-s390x: add a tod2time function, Alexander Graf, 2015/06/04
- [Qemu-devel] [PULL 02/34] target-s390x: fix CC computation for LOAD POSITIVE instructions, Alexander Graf, 2015/06/04
- [Qemu-devel] [PULL 09/34] target-s390x: implement STPT helper, Alexander Graf, 2015/06/04
- [Qemu-devel] [PULL 14/34] target-s390x: silence NaNs for LOAD LENGTHENED and LOAD ROUNDED, Alexander Graf, 2015/06/04
- [Qemu-devel] [PULL 16/34] target-s390x: move a few instructions to the correct facility, Alexander Graf, 2015/06/04
- [Qemu-devel] [PULL 20/34] target-s390x: change CHRL and CGHRL format to RIL-b,
Alexander Graf <=
- [Qemu-devel] [PULL 30/34] target-s390x: add a cpu_mmu_idx_to_asc function, Alexander Graf, 2015/06/04
- [Qemu-devel] [PULL 12/34] target-s390x: fix MMU index computation, Alexander Graf, 2015/06/04
- [Qemu-devel] [PULL 11/34] target-s390x: fix PSW value on dynamical exception from helpers, Alexander Graf, 2015/06/04
- [Qemu-devel] [PULL 15/34] target-s390x: detect tininess before rounding for FP operations, Alexander Graf, 2015/06/04
- [Qemu-devel] [PULL 03/34] target-s390x: optimize (negative-) abs computation, Alexander Graf, 2015/06/04
- [Qemu-devel] [PULL 01/34] target-s390x: fix CC computation for EX instruction, Alexander Graf, 2015/06/04
- [Qemu-devel] [PULL 24/34] target-s390x: implement TRANSLATE AND TEST instruction, Alexander Graf, 2015/06/04
- [Qemu-devel] [PULL 13/34] target-s390x: define default NaN values, Alexander Graf, 2015/06/04