[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v2 6/9] target-microblaze: Convert pvr-full to a CPU
From: |
Alistair Francis |
Subject: |
[Qemu-devel] [PATCH v2 6/9] target-microblaze: Convert pvr-full to a CPU property |
Date: |
Fri, 5 Jun 2015 16:42:40 +1000 |
Originally the pvr-full PVR bits were manually set for each machine. This
is a hassle and difficult to read, instead set them based on the CPU
properties.
Signed-off-by: Alistair Francis <address@hidden>
---
V2:
- Rename DTS mapping
target-microblaze/cpu-qom.h | 1 +
target-microblaze/cpu.c | 5 +++--
target-microblaze/helper.c | 4 ++--
3 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/target-microblaze/cpu-qom.h b/target-microblaze/cpu-qom.h
index 7da25fa..74d70de 100644
--- a/target-microblaze/cpu-qom.h
+++ b/target-microblaze/cpu-qom.h
@@ -68,6 +68,7 @@ typedef struct MicroBlazeCPU {
bool dcache_writeback;
bool endi;
char *version;
+ bool pvr_full;
} cfg;
CPUMBState env;
diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c
index a6e1872..8a86aa5 100644
--- a/target-microblaze/cpu.c
+++ b/target-microblaze/cpu.c
@@ -129,8 +129,7 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
qemu_init_vcpu(cs);
- env->pvr.regs[0] = PVR0_PVR_FULL_MASK \
- | PVR0_USE_BARREL_MASK \
+ env->pvr.regs[0] = PVR0_USE_BARREL_MASK \
| PVR0_USE_DIV_MASK \
| PVR0_USE_HW_MUL_MASK \
| PVR0_USE_EXC_MASK \
@@ -166,6 +165,7 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
(cpu->cfg.use_mmu ? PVR0_USE_MMU_MASK : 0);
(cpu->cfg.endi ? PVR0_ENDI_MASK : 0) |
(version_code << 16);
+ (cpu->cfg.pvr_full ? PVR0_PVR_FULL_MASK : 0);
env->pvr.regs[2] |= (cpu->cfg.use_fpu ? PVR2_USE_FPU_MASK : 0) |
(cpu->cfg.use_fpu > 1 ? PVR2_USE_FPU2_MASK : 0);
@@ -227,6 +227,7 @@ static Property mb_properties[] = {
false),
DEFINE_PROP_BOOL("endianness", MicroBlazeCPU, cfg.endi, false),
DEFINE_PROP_STRING("version", MicroBlazeCPU, cfg.version),
+ DEFINE_PROP_BOOL("pvr", MicroBlazeCPU, cfg.pvr_full, true),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/target-microblaze/helper.c b/target-microblaze/helper.c
index 5156c12..c3e1d79 100644
--- a/target-microblaze/helper.c
+++ b/target-microblaze/helper.c
@@ -58,8 +58,8 @@ int mb_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int
rw,
mmu_available = 0;
if (cpu->cfg.use_mmu) {
mmu_available = 1;
- if ((env->pvr.regs[0] & PVR0_PVR_FULL_MASK)
- && (env->pvr.regs[11] & PVR11_USE_MMU) != PVR11_USE_MMU) {
+ if (cpu->cfg.pvr_full &&
+ (env->pvr.regs[11] & PVR11_USE_MMU) != PVR11_USE_MMU) {
mmu_available = 0;
}
}
--
1.7.1
- [Qemu-devel] [PATCH v2 0/9] Extend Microblaze Properties, Alistair Francis, 2015/06/05
- [Qemu-devel] [PATCH v2 1/9] target-microblaze: Rename the usefpu variable, Alistair Francis, 2015/06/05
- [Qemu-devel] [PATCH v2 4/9] target-microblaze: Convert endi to a CPU property, Alistair Francis, 2015/06/05
- [Qemu-devel] [PATCH v2 5/9] target-microblaze: Convert version_mask to a CPU property, Alistair Francis, 2015/06/05
- [Qemu-devel] [PATCH v2 6/9] target-microblaze: Convert pvr-full to a CPU property,
Alistair Francis <=
- [Qemu-devel] [PATCH v2 7/9] ml605_mmu: Move the hardcoded values to the init function, Alistair Francis, 2015/06/05
- [Qemu-devel] [PATCH v2 8/9] s3adsp1800: Remove the hardcoded values from the reset, Alistair Francis, 2015/06/05
- [Qemu-devel] [PATCH v2 9/9] target-microblaze: Remove dead code, Alistair Francis, 2015/06/05
- [Qemu-devel] [PATCH v2 3/9] target-microblaze: Convert dcache-writeback to a CPU property, Peter Crosthwaite, 2015/06/08