On Wed, Jun 03, 2015 at 02:38:12PM -0400, cao2 wrote:
I'm trying to design a virtual system on chip platform to do post-silicon
verification, to do that, I need to monitor the signal trace and analyse it. I
just started using this software, so I'm not sure if it can monitor the
messages sent between IP blocks and if the protocol of the virtual platform is
visible for me.
Currently I'm trying to create a model with 2 arm cores, with its own full
caches, connected by bus to another shared memory. I already tried soclib and
ovp and qemu is my last hope, please help, any advice will be nice.
QEMU emulates functional behavior, it is not a simulator. For example,
it doesn't model the CPU cache or timings.
Stefan