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[Qemu-devel] [PATCH 3/5] arm: Support thumb in set_pc routines
From: |
Peter Crosthwaite |
Subject: |
[Qemu-devel] [PATCH 3/5] arm: Support thumb in set_pc routines |
Date: |
Sun, 14 Jun 2015 20:48:30 -0700 |
ARM program counters are always at least 16b aligned with the LSB
being only used the indicate thumb mode in exchange situations. Mask
this bit off in set_pc to ignore the exchange semantic (which must
still be managed by the caller).
Signed-off-by: Peter Crosthwaite <address@hidden>
---
---
target-arm/cpu.c | 2 +-
target-arm/cpu64.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 6181f28..5bb08a6 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -35,7 +35,7 @@ static void arm_cpu_set_pc(CPUState *cs, vaddr value)
{
ARMCPU *cpu = ARM_CPU(cs);
- cpu->env.regs[15] = value;
+ cpu->env.regs[15] = value & 0xfffffffe;
}
static bool arm_cpu_has_work(CPUState *cs)
diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c
index bf7dd68..1e26a48 100644
--- a/target-arm/cpu64.c
+++ b/target-arm/cpu64.c
@@ -279,7 +279,7 @@ static void aarch64_cpu_set_pc(CPUState *cs, vaddr value)
if (is_a64(&cpu->env)) {
cpu->env.pc = value;
} else {
- cpu->env.regs[15] = value;
+ cpu->env.regs[15] = value & 0xfffffffe;
}
}
--
1.9.1