Re: [Qemu-devel] QEMU ARM SMP: IPI delivery delayed until next main loop event // how to improve IPI latency?

[Peter Maydell]

On 15 June 2015 at 15:44, Alex Züpke <address@hidden> wrote:
> Am 12.06.2015 um 20:03 schrieb Peter Maydell:
>> Probably the best approach would be to have something in
>> arm_cpu_set_irq() which says "if we are CPU X and we've
>> just caused an interrupt to be set for CPU Y, then we
>> should ourselves yield back to the main loop".
>>
>> Something like this, maybe, though I have done no more testing
>> than checking it doesn't actively break kernel booting :-)
>
>
> Thanks! One more check for "level" is needed to get it work:

What happens without that? It's reasonable to have it,
but extra cpu_exit()s shouldn't cause a problem beyond
being a bit inefficient...

It would be interesting to know if this helps Linux as well
as your custom OS. (I don't know whether a "CPU #0 polls"
approach is bad on hardware too; the other option would be
to have CPU #1 IPI back in the other direction if 0 needed
to wait for a response.)

-- PMM