Possible values for the protection bits are necessarly non-zero and thus
H_PUT_TCE_INDIRECT currently always fails and returns H_PARAMETER.
The code explicitly clears the protection bits when computing the TCE offset,
a few lines below (tce_list & ~SPAPR_TCE_RW)... The sanity check is obviously
wrong for these bits.
Moreover, I could find no indication in PAPR+ that using the other reserved
bits should error out with H_PARAMETER.
This patch simply drops the offending check.
Signed-off-by: Greg Kurz <address@hidden>
---
hw/ppc/spapr_iommu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/spapr_iommu.c b/hw/ppc/spapr_iommu.c
index 8cd9dba9ac4d..37a1110c9d87 100644
--- a/hw/ppc/spapr_iommu.c
+++ b/hw/ppc/spapr_iommu.c
@@ -258,7 +258,7 @@ static target_ulong h_put_tce_indirect(PowerPCCPU *cpu,
return H_PARAMETER;
}
- if ((npages > 512) || (tce_list & SPAPR_TCE_PAGE_MASK)) {
+ if (npages > 512) {
return H_PARAMETER;
}