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[Qemu-devel] [PATCH v2 01/16] ahci: Rename NCQFIS structure fields
From: |
John Snow |
Subject: |
[Qemu-devel] [PATCH v2 01/16] ahci: Rename NCQFIS structure fields |
Date: |
Mon, 22 Jun 2015 19:38:13 -0400 |
Several fields of the NCQFIS structure are ambiguously named. This patch
clarifies the intended (if unsupported) usage of the NCQ fields to aid
in creating more meaningful debug messages through the NCQ codepaths.
Signed-off-by: John Snow <address@hidden>
---
hw/ide/ahci.h | 35 +++++++++++++++++++++++++----------
1 file changed, 25 insertions(+), 10 deletions(-)
diff --git a/hw/ide/ahci.h b/hw/ide/ahci.h
index 501c002..6d167f2 100644
--- a/hw/ide/ahci.h
+++ b/hw/ide/ahci.h
@@ -195,6 +195,9 @@
#define RECEIVE_FPDMA_QUEUED 0x65
#define SEND_FPDMA_QUEUED 0x64
+#define NCQ_FIS_FUA_MASK 0x80
+#define NCQ_FIS_RARC_MASK 0x01
+
#define RES_FIS_DSFIS 0x00
#define RES_FIS_PSFIS 0x20
#define RES_FIS_RFIS 0x40
@@ -312,27 +315,39 @@ extern const VMStateDescription vmstate_ahci;
.offset = vmstate_offset_value(_state, _field, AHCIState), \
}
+/**
+ * NCQFrame is the same as a Register H2D FIS (described in SATA 3.2),
+ * but some fields have been re-mapped and re-purposed, as seen in
+ * SATA 3.2 section 13.6.4.1 ("READ FPDMA QUEUED")
+ *
+ * cmd_fis[3], feature 7:0, becomes sector count 7:0.
+ * cmd_fis[7], device 7:0, uses bit 7 as the Force Unit Access bit.
+ * cmd_fis[11], feature 15:8, becomes sector count 15:8.
+ * cmd_fis[12], count 7:0, becomes the NCQ TAG (7:3) and RARC bit (0)
+ * cmd_fis[13], count 15:8, becomes the priority value (7:6)
+ * bytes 16-19 become an le32 "auxiliary" field.
+ */
typedef struct NCQFrame {
uint8_t fis_type;
uint8_t c;
uint8_t command;
- uint8_t sector_count_low;
+ uint8_t sector_count_low; /* (feature 7:0) */
uint8_t lba0;
uint8_t lba1;
uint8_t lba2;
- uint8_t fua;
+ uint8_t fua; /* (device 7:0) */
uint8_t lba3;
uint8_t lba4;
uint8_t lba5;
- uint8_t sector_count_high;
- uint8_t tag;
- uint8_t reserved5;
- uint8_t reserved6;
+ uint8_t sector_count_high; /* (feature 15:8) */
+ uint8_t tag; /* (count 0:7) */
+ uint8_t prio; /* (count 15:8) */
+ uint8_t icc;
uint8_t control;
- uint8_t reserved7;
- uint8_t reserved8;
- uint8_t reserved9;
- uint8_t reserved10;
+ uint8_t aux0;
+ uint8_t aux1;
+ uint8_t aux2;
+ uint8_t aux3;
} QEMU_PACKED NCQFrame;
typedef struct SDBFIS {
--
2.1.0
- [Qemu-devel] [PATCH v2 00/16] ahci: ncq cleanup, part 1, John Snow, 2015/06/22
- [Qemu-devel] [PATCH v2 01/16] ahci: Rename NCQFIS structure fields,
John Snow <=
- [Qemu-devel] [PATCH v2 03/16] ahci: add ncq_err helper, John Snow, 2015/06/22
- [Qemu-devel] [PATCH v2 04/16] ahci: check for ncq prdtl overflow, John Snow, 2015/06/22
- [Qemu-devel] [PATCH v2 02/16] ahci: use shorter variables, John Snow, 2015/06/22
- [Qemu-devel] [PATCH v2 06/16] ahci: add ncq debug checks, John Snow, 2015/06/22
- [Qemu-devel] [PATCH v2 05/16] ahci: separate prdtl from opts, John Snow, 2015/06/22
- [Qemu-devel] [PATCH v2 07/16] ahci: ncq sector count correction, John Snow, 2015/06/22
- [Qemu-devel] [PATCH v2 08/16] ahci/qtest: Execute IDENTIFY prior to data commands, John Snow, 2015/06/22
- [Qemu-devel] [PATCH v2 09/16] libqos/ahci: fix cmd_sanity for ncq, John Snow, 2015/06/22
- [Qemu-devel] [PATCH v2 10/16] libqos/ahci: add NCQ frame support, John Snow, 2015/06/22
- [Qemu-devel] [PATCH v2 11/16] libqos/ahci: edit wait to be ncq aware, John Snow, 2015/06/22