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[Qemu-devel] [PATCH 14/22] spapr: Support ibm, lrdr-capacity device tree
From: |
David Gibson |
Subject: |
[Qemu-devel] [PATCH 14/22] spapr: Support ibm, lrdr-capacity device tree property |
Date: |
Wed, 24 Jun 2015 16:30:28 +1000 |
From: Bharata B Rao <address@hidden>
Add support for ibm,lrdr-capacity since this is needed by the guest
kernel to know about the possible hot-pluggable CPUs and Memory. With
this, pseries kernels will start reporting correct maxcpus in
/sys/devices/system/cpu/possible.
Also define the minimum hotpluggable memory size as 256MB.
Signed-off-by: Bharata B Rao <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
docs/specs/ppc-spapr-hotplug.txt | 18 ++++++++++++++++++
hw/ppc/spapr_rtas.c | 16 ++++++++++++++++
include/hw/ppc/spapr.h | 2 ++
3 files changed, 36 insertions(+)
diff --git a/docs/specs/ppc-spapr-hotplug.txt b/docs/specs/ppc-spapr-hotplug.txt
index d35771c..46e0719 100644
--- a/docs/specs/ppc-spapr-hotplug.txt
+++ b/docs/specs/ppc-spapr-hotplug.txt
@@ -284,4 +284,22 @@ struct rtas_event_log_v6_hp {
} drc;
} QEMU_PACKED;
+== ibm,lrdr-capacity ==
+
+ibm,lrdr-capacity is a property in the /rtas device tree node that identifies
+the dynamic reconfiguration capabilities of the guest. It consists of a triple
+consisting of <phys>, <size> and <maxcpus>.
+
+ <phys>, encoded in BE format represents the maximum address in bytes and
+ hence the maximum memory that can be allocated to the guest.
+
+ <size>, encoded in BE format represents the size increments in which
+ memory can be hot-plugged to the guest.
+
+ <maxcpus>, a BE-encoded integer, represents the maximum number of
+ processors that the guest can have.
+
+pseries guests use this property to note the maximum allowed CPUs for the
+guest.
+
[1] http://thread.gmane.org/gmane.linux.ports.ppc.embedded/75350/focus=106867
diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
index 3b95dfc..592e504 100644
--- a/hw/ppc/spapr_rtas.c
+++ b/hw/ppc/spapr_rtas.c
@@ -29,6 +29,7 @@
#include "sysemu/char.h"
#include "hw/qdev.h"
#include "sysemu/device_tree.h"
+#include "sysemu/cpus.h"
#include "hw/ppc/spapr.h"
#include "hw/ppc/spapr_vio.h"
@@ -651,6 +652,8 @@ int spapr_rtas_device_tree_setup(void *fdt, hwaddr
rtas_addr,
{
int ret;
int i;
+ uint32_t lrdr_capacity[5];
+ MachineState *machine = MACHINE(qdev_get_machine());
ret = fdt_add_mem_rsv(fdt, rtas_addr, rtas_size);
if (ret < 0) {
@@ -699,6 +702,19 @@ int spapr_rtas_device_tree_setup(void *fdt, hwaddr
rtas_addr,
}
}
+
+ lrdr_capacity[0] = cpu_to_be32(machine->maxram_size >> 32);
+ lrdr_capacity[1] = cpu_to_be32(machine->maxram_size & 0xffffffff);
+ lrdr_capacity[2] = 0;
+ lrdr_capacity[3] = cpu_to_be32(SPAPR_MEMORY_BLOCK_SIZE);
+ lrdr_capacity[4] = cpu_to_be32(max_cpus/smp_threads);
+ ret = qemu_fdt_setprop(fdt, "/rtas", "ibm,lrdr-capacity", lrdr_capacity,
+ sizeof(lrdr_capacity));
+ if (ret < 0) {
+ fprintf(stderr, "Couldn't add ibm,lrdr-capacity rtas property\n");
+ return ret;
+ }
+
return 0;
}
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index 0aeac50..91a61ab 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -607,4 +607,6 @@ void spapr_ccs_reset_hook(void *opaque);
void spapr_rtc_read(DeviceState *dev, struct tm *tm, uint32_t *ns);
int spapr_rtc_import_offset(DeviceState *dev, int64_t legacy_offset);
+#define SPAPR_MEMORY_BLOCK_SIZE (1 << 28) /* 256MB */
+
#endif /* !defined (__HW_SPAPR_H__) */
--
2.4.3
- [Qemu-devel] [PATCH 00/22] sPAPR updates 2015-06-24, David Gibson, 2015/06/24
- [Qemu-devel] [PATCH 10/22] spapr_iommu: drop erroneous check in h_put_tce_indirect(), David Gibson, 2015/06/24
- [Qemu-devel] [PATCH 06/22] spapr: Add sPAPRMachineClass, David Gibson, 2015/06/24
- [Qemu-devel] [PATCH 11/22] spapr_iommu: translate sPAPRTCEAccess to IOMMUAccessFlags, David Gibson, 2015/06/24
- [Qemu-devel] [PATCH 07/22] spapr_pci: encode missing 64-bit memory address space, David Gibson, 2015/06/24
- [Qemu-devel] [PATCH 09/22] spapr_pci: set device node unit address as hex, David Gibson, 2015/06/24
- [Qemu-devel] [PATCH 14/22] spapr: Support ibm, lrdr-capacity device tree property,
David Gibson <=
- [Qemu-devel] [PATCH 12/22] Revert "hw/ppc/spapr_pci.c: Avoid functions not in glib 2.12 (g_hash_table_iter_*)", David Gibson, 2015/06/24
- [Qemu-devel] [PATCH 13/22] spapr: Consider max_cpus during xics initialization, David Gibson, 2015/06/24
- [Qemu-devel] [PATCH 05/22] spapr: Remove obsolete entry_point field from sPAPRMachineState, David Gibson, 2015/06/24
- [Qemu-devel] [PATCH 04/22] spapr: Remove obsolete ram_limit field from sPAPRMachineState, David Gibson, 2015/06/24
- [Qemu-devel] [PATCH 08/22] spapr_pci: encode class code including Prog IF register, David Gibson, 2015/06/24
- [Qemu-devel] [PATCH 03/22] spapr: Merge sPAPREnvironment into sPAPRMachineState, David Gibson, 2015/06/24
- [Qemu-devel] [PATCH 02/22] pseries: Update SLOF firmware image to qemu-slof-20150429, David Gibson, 2015/06/24
- [Qemu-devel] [PATCH 01/22] spapr: ensure we have at least one XICS server, David Gibson, 2015/06/24
- [Qemu-devel] [PATCH 15/22] cpus: Add a macro to walk CPUs in reverse, David Gibson, 2015/06/24
- [Qemu-devel] [PATCH 17/22] spapr: Consolidate cpu init code into a routine, David Gibson, 2015/06/24